| Line 242... |
Line 242... |
}
|
}
|
}
|
}
|
|
|
static void send_char (int uart, int bits_send)
|
static void send_char (int uart, int bits_send)
|
{
|
{
|
PRINTF ("'%c'\n", uarts[uart].iregs.txser);
|
PRINTF ("%c", uarts[uart].iregs.txser);
|
debug(4, "TX \'%c\' via UART%d...\n", uarts[uart].iregs.txser, uart);
|
debug(4, "TX \'%c\' via UART%d...\n", uarts[uart].iregs.txser, uart);
|
if (uarts[uart].regs.mcr & UART_MCR_LOOP)
|
if (uarts[uart].regs.mcr & UART_MCR_LOOP)
|
uarts[uart].iregs.loopback = uarts[uart].iregs.txser;
|
uarts[uart].iregs.loopback = uarts[uart].iregs.txser;
|
else {
|
else {
|
/* Send to either VAPI or to file */
|
/* Send to either VAPI or to file */
|
| Line 422... |
Line 422... |
if (uarts[i].istat.rxser_full) {
|
if (uarts[i].istat.rxser_full) {
|
if (uarts[i].char_clks <= uarts[i].istat.rxser_clks++) {
|
if (uarts[i].char_clks <= uarts[i].istat.rxser_clks++) {
|
/* Set unused character bits to zero and allow lsr register in fifo */
|
/* Set unused character bits to zero and allow lsr register in fifo */
|
uarts[i].iregs.rxser &= ((1 << ((uarts[i].regs.lcr & 3) + 5)) - 1) | 0xff00;
|
uarts[i].iregs.rxser &= ((1 << ((uarts[i].regs.lcr & 3) + 5)) - 1) | 0xff00;
|
debug(4, "Receiving 0x%02x'%c' via UART%d...\n", uarts[i].iregs.rxser, uarts[i].iregs.rxser, i);
|
debug(4, "Receiving 0x%02x'%c' via UART%d...\n", uarts[i].iregs.rxser, uarts[i].iregs.rxser, i);
|
|
PRINTF ("%c", uarts[i].iregs.rxser);
|
uarts[i].istat.rxser_full = 0;
|
uarts[i].istat.rxser_full = 0;
|
uarts[i].istat.rxser_clks = 0;
|
uarts[i].istat.rxser_clks = 0;
|
uart_add_char (i, uarts[i].iregs.rxser);
|
uart_add_char (i, uarts[i].iregs.rxser);
|
}
|
}
|
}
|
}
|
