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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.15 2002/06/08 16:20:21 lampret
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// Added defines for enabling generic FF based memory macro for register file.
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//
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// Revision 1.14 2002/03/29 16:24:06 lampret
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// Revision 1.14 2002/03/29 16:24:06 lampret
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// Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives
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// Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives
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//
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//
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// Revision 1.13 2002/03/29 15:16:55 lampret
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// Revision 1.13 2002/03/29 15:16:55 lampret
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// Some of the warnings fixed.
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// Some of the warnings fixed.
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//
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//
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// Target FPGA memories
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// Target FPGA memories
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//
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//
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`define OR1200_XILINX_RAMB4
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`define OR1200_XILINX_RAMB4
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//`define OR1200_XILINX_RAM32X1D
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//`define OR1200_XILINX_RAM32X1D
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//`define OR1200_USE_RAM16X1D_FOR_RAM32X1D
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//
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//
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// Do not implement Data cache
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// Do not implement Data cache
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//
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//
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//`define OR1200_NO_DC
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//`define OR1200_NO_DC
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//
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//
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// Do not change below unless you know what you are doing
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// Do not change below unless you know what you are doing
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//
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//
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//
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//
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// Disable bursts if they are not supported by the
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// memory subsystem (only affect cache line fill)
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//
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//`define OR1200_NO_BURSTS
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//
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//
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// Enable additional synthesis directives if using
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// Enable additional synthesis directives if using
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// _Synopsys_ synthesis tool
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// _Synopsys_ synthesis tool
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//
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//
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//`define OR1200_ADDITIONAL_SYNOPSYS_DIRECTIVES
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//`define OR1200_ADDITIONAL_SYNOPSYS_DIRECTIVES
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//
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//
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// Define it if you want DU implemented
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// Define it if you want DU implemented
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`define OR1200_DU_IMPLEMENTED
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`define OR1200_DU_IMPLEMENTED
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// Define if you want trace buffer
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// (for now only available for Xilinx Virtex FPGAs)
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`define OR1200_DU_TB_IMPLEMENTED
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// Address offsets of DU registers inside DU group
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// Address offsets of DU registers inside DU group
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`define OR1200_DU_OFS_DMR1 5'd16
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`define OR1200_DU_OFS_DMR1 11'd16
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`define OR1200_DU_OFS_DMR2 5'd17
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`define OR1200_DU_OFS_DMR2 11'd17
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`define OR1200_DU_OFS_DSR 5'd20
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`define OR1200_DU_OFS_DSR 11'd20
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`define OR1200_DU_OFS_DRR 5'd21
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`define OR1200_DU_OFS_DRR 11'd21
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`define OR1200_DU_OFS_TBADR 11'h00ff
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`define OR1200_DU_OFS_TBIA 11'h01xx
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`define OR1200_DU_OFS_TBIM 11'h02xx
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`define OR1200_DU_OFS_TBAR 11'h03xx
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`define OR1200_DU_OFS_TBTS 11'h10xx
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// Position of offset bits inside SPR address
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// Position of offset bits inside SPR address
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`define OR1200_DUOFS_BITS 4:0
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`define OR1200_DUOFS_BITS 10:0
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// Define if you want these DU registers to be implemented
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// Define if you want these DU registers to be implemented
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`define OR1200_DU_DMR1
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`define OR1200_DU_DMR1
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`define OR1200_DU_DMR2
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`define OR1200_DU_DMR2
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`define OR1200_DU_DSR
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`define OR1200_DU_DSR
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