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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.1 2002/01/03 08:16:15 lampret
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// New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.
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//
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// Revision 1.9 2001/10/21 17:57:16 lampret
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// Revision 1.9 2001/10/21 17:57:16 lampret
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// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from ic.v and ic.v. Fixed CR+LF.
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// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from ic.v and ic.v. Fixed CR+LF.
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//
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//
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// Revision 1.8 2001/10/19 23:28:46 lampret
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// Revision 1.8 2001/10/19 23:28:46 lampret
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// Fixed some synthesis warnings. Configured with caches and MMUs.
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// Fixed some synthesis warnings. Configured with caches and MMUs.
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Line 190... |
Line 193... |
state <= #1 `OR1200_ICFSM_DOLOAD;
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state <= #1 `OR1200_ICFSM_DOLOAD;
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saved_addr <= #1 start_addr;
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saved_addr <= #1 start_addr;
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hitmiss_eval <= #1 1'b1;
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hitmiss_eval <= #1 1'b1;
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load <= #1 1'b1;
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load <= #1 1'b1;
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end
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end
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else if (!icimmu_cyc_i | !icimmu_stb_i) begin // load aborted (usually caused by exception)
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state <= #1 `OR1200_ICFSM_IDLE;
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hitmiss_eval <= #1 1'b0;
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load <= #1 1'b0;
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end
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else // load in-progress
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else // load in-progress
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hitmiss_eval <= #1 1'b0;
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hitmiss_eval <= #1 1'b0;
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`OR1200_ICFSM_LREFILL3 : begin
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`OR1200_ICFSM_LREFILL3 : begin
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if (biudata_valid && (|cnt)) begin // refill ack, more loads to come
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if (biudata_valid && (|cnt)) begin // refill ack, more loads to come
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cnt <= #1 cnt - 'd1;
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cnt <= #1 cnt - 'd1;
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