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[/] [or1k/] [tags/] [rel_20/] [or1200/] [rtl/] [verilog/] [or1200_ic_tag.v] - Diff between revs 504 and 1063

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Rev 504	Rev 1063
Line 42...	Line 42...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.1 2002/01/03 08:16:15 lampret`
	`// New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.`
	`//`
`// Revision 1.8 2001/10/21 17:57:16 lampret`	`// Revision 1.8 2001/10/21 17:57:16 lampret`
`// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF.`	`// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF.`
`//`	`//`
`// Revision 1.7 2001/10/14 13:12:09 lampret`	`// Revision 1.7 2001/10/14 13:12:09 lampret`
`// MP3 version.`	`// MP3 version.`
Line 68...	Line 71...

`module or1200_ic_tag(`	`module or1200_ic_tag(`
`// Clock and reset`	`// Clock and reset`
`clk, rst,`	`clk, rst,`

	`ifdef OR1200_BIST
	`// RAM BIST`
	`scanb_rst, scanb_si, scanb_so, scanb_eni, scanb_clk,`
	`endif

`// Internal i/f`	`// Internal i/f`
`addr, en, we, datain, tag_v, tag`	`addr, en, we, datain, tag_v, tag`
`);`	`);`

parameter dw = `OR1200_ICTAG_W;	parameter dw = `OR1200_ICTAG_W;
Line 85...	Line 93...
`// Clock and reset`	`// Clock and reset`
`//`	`//`
`input clk;`	`input clk;`
`input rst;`	`input rst;`

	`ifdef OR1200_BIST
	`//`
	`// RAM BIST`
	`//`
	`input scanb_rst,`
	`scanb_si,`
	`scanb_en,`
	`scanb_clk;`
	`output scanb_so;`
	`endif

`//`	`//`
`// Internal i/f`	`// Internal i/f`
`//`	`//`
`input [aw-1:0] addr;`	`input [aw-1:0] addr;`
`input en;`	`input en;`
Line 102...	Line 121...
`//`	`//`
`// Insn cache not implemented`	`// Insn cache not implemented`
`//`	`//`
`assign tag = {dw-1{1'b0}};`	`assign tag = {dw-1{1'b0}};`
`assign tag_v = 1'b0;`	`assign tag_v = 1'b0;`
	`ifdef OR1200_BIST
	`assign scanb_so = scanb_si;`
	`endif

`else	`else

`//`	`//`
`// Instantiation of TAG RAM block`	`// Instantiation of TAG RAM block`
`//`	`//`
Line 113...	Line 136...
`or1200_spram_256x21 ic_tag0(`	`or1200_spram_256x21 ic_tag0(`
`endif	`endif
`ifdef OR1200_IC_1W_8KB	`ifdef OR1200_IC_1W_8KB
`or1200_spram_512x20 ic_tag0(`	`or1200_spram_512x20 ic_tag0(`
`endif	`endif
	`ifdef OR1200_BIST
	`// RAM BIST`
	`.scanb_rst(scanb_rst),`
	`.scanb_si(scanb_si),`
	`.scanb_so(scanb_so),`
	`.scanb_en(scanb_en),`
	`.scanb_clk(scanb_clk),`
	`endif
`.clk(clk),`	`.clk(clk),`
`.rst(rst),`	`.rst(rst),`
`.ce(en),`	`.ce(en),`
`.we(we),`	`.we(we),`
`.oe(1'b1),`	`.oe(1'b1),`

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[/] [or1k/] [tags/] [rel_20/] [or1200/] [rtl/] [verilog/] [or1200_ic_tag.v] - Diff between revs 504 and 1063