| Line 43... |
Line 43... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.9 2002/03/29 16:29:37 lampret
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// Fixed some ports in instnatiations that were removed from the modules
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//
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// Revision 1.8 2002/03/29 15:16:54 lampret
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// Revision 1.8 2002/03/29 15:16:54 lampret
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// Some of the warnings fixed.
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// Some of the warnings fixed.
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//
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//
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// Revision 1.7 2002/02/11 04:33:17 lampret
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// Revision 1.7 2002/02/11 04:33:17 lampret
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// Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr.
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// Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr.
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| Line 134... |
Line 137... |
icpu_dat_i, icpu_ack_i, icpu_rty_i, icpu_err_i, icpu_adr_i, icpu_tag_i,
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icpu_dat_i, icpu_ack_i, icpu_rty_i, icpu_err_i, icpu_adr_i, icpu_tag_i,
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immu_en,
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immu_en,
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// Debug unit
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// Debug unit
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ex_insn, ex_freeze, branch_op,
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ex_insn, ex_freeze, branch_op,
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spr_dat_npc, rf_dataw,
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du_stall, du_addr, du_dat_du, du_read, du_write, du_dsr, du_except, du_dat_cpu,
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du_stall, du_addr, du_dat_du, du_read, du_write, du_dsr, du_except, du_dat_cpu,
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// Data interface
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// Data interface
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dc_en,
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dc_en,
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dcpu_adr_o, dcpu_cycstb_o, dcpu_we_o, dcpu_sel_o, dcpu_tag_o, dcpu_dat_o,
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dcpu_adr_o, dcpu_cycstb_o, dcpu_we_o, dcpu_sel_o, dcpu_tag_o, dcpu_dat_o,
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| Line 189... |
Line 193... |
// Debug interface
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// Debug interface
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//
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//
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output [31:0] ex_insn;
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output [31:0] ex_insn;
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output ex_freeze;
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output ex_freeze;
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output [`OR1200_BRANCHOP_WIDTH-1:0] branch_op;
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output [`OR1200_BRANCHOP_WIDTH-1:0] branch_op;
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input du_stall;
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input du_stall;
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input [dw-1:0] du_addr;
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input [dw-1:0] du_addr;
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input [dw-1:0] du_dat_du;
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input [dw-1:0] du_dat_du;
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input du_read;
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input du_read;
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input du_write;
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input du_write;
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input [`OR1200_DU_DSR_WIDTH-1:0] du_dsr;
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input [`OR1200_DU_DSR_WIDTH-1:0] du_dsr;
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output [12:0] du_except;
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output [12:0] du_except;
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output [dw-1:0] du_dat_cpu;
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output [dw-1:0] du_dat_cpu;
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output [dw-1:0] rf_dataw;
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//
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//
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// Data (DC) interface
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// Data (DC) interface
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//
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//
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output [31:0] dcpu_adr_o;
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output [31:0] dcpu_adr_o;
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| Line 231... |
Line 237... |
input [dw-1:0] spr_dat_dmmu;
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input [dw-1:0] spr_dat_dmmu;
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input [dw-1:0] spr_dat_immu;
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input [dw-1:0] spr_dat_immu;
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input [dw-1:0] spr_dat_du;
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input [dw-1:0] spr_dat_du;
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output [dw-1:0] spr_addr;
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output [dw-1:0] spr_addr;
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output [dw-1:0] spr_dat_cpu;
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output [dw-1:0] spr_dat_cpu;
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output [dw-1:0] spr_dat_npc;
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output [31:0] spr_cs;
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output [31:0] spr_cs;
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output spr_we;
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output spr_we;
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//
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//
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// Interrupt exceptions
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// Interrupt exceptions
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| Line 660... |
Line 667... |
.mac_stall(mac_stall),
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.mac_stall(mac_stall),
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.genpc_freeze(genpc_freeze),
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.genpc_freeze(genpc_freeze),
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.if_freeze(if_freeze),
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.if_freeze(if_freeze),
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.id_freeze(id_freeze),
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.id_freeze(id_freeze),
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.ex_freeze(ex_freeze),
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.ex_freeze(ex_freeze),
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.wb_freeze(wb_freeze)
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.wb_freeze(wb_freeze),
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.icpu_ack_i(icpu_ack_i),
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.icpu_err_i(icpu_err_i)
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);
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);
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//
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//
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// Instantiation of exception block
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// Instantiation of exception block
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//
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//
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| Line 683... |
Line 692... |
.sig_trap(sig_trap),
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.sig_trap(sig_trap),
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.sig_itlbmiss(except_itlbmiss),
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.sig_itlbmiss(except_itlbmiss),
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.sig_immufault(except_immufault),
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.sig_immufault(except_immufault),
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.sig_tick(sig_tick),
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.sig_tick(sig_tick),
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.branch_taken(branch_taken),
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.branch_taken(branch_taken),
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.icpu_ack_i(icpu_ack_i),
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.icpu_err_i(icpu_err_i),
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.dcpu_ack_i(dcpu_ack_i),
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.dcpu_err_i(dcpu_err_i),
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.genpc_freeze(genpc_freeze),
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.id_freeze(id_freeze),
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.id_freeze(id_freeze),
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.ex_freeze(ex_freeze),
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.ex_freeze(ex_freeze),
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.wb_freeze(wb_freeze),
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.wb_freeze(wb_freeze),
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.if_stall(if_stall),
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.if_stall(if_stall),
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.if_pc(if_pc),
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.if_pc(if_pc),
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