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[/] [or1k/] [tags/] [rel_21/] [or1200/] [rtl/] [verilog/] [or1200_dc_top.v] - Diff between revs 1171 and 1214

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Rev 1171	Rev 1214
Line 42...	Line 42...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.6.4.1 2003/07/08 15:36:37 lampret`
	`// Added embedded memory QMEM.`
	`//`
`// Revision 1.6 2002/10/17 20:04:40 lampret`	`// Revision 1.6 2002/10/17 20:04:40 lampret`
`// Added BIST scan. Special VS RAMs need to be used to implement BIST.`	`// Added BIST scan. Special VS RAMs need to be used to implement BIST.`
`//`	`//`
`// Revision 1.5 2002/08/18 19:54:47 lampret`	`// Revision 1.5 2002/08/18 19:54:47 lampret`
`// Added store buffer.`	`// Added store buffer.`
Line 107...	Line 110...
`dcqmem_we_i, dcqmem_sel_i, dcqmem_tag_i, dcqmem_dat_i,`	`dcqmem_we_i, dcqmem_sel_i, dcqmem_tag_i, dcqmem_dat_i,`
`dcqmem_dat_o, dcqmem_ack_o, dcqmem_rty_o, dcqmem_err_o, dcqmem_tag_o,`	`dcqmem_dat_o, dcqmem_ack_o, dcqmem_rty_o, dcqmem_err_o, dcqmem_tag_o,`

`ifdef OR1200_BIST	`ifdef OR1200_BIST
`// RAM BIST`	`// RAM BIST`
`scanb_rst, scanb_si, scanb_so, scanb_en, scanb_clk,`	`mbist_si_i, mbist_so_o, mbist_ctrl_i,`
`endif	`endif

`// SPRs`	`// SPRs`
`spr_cs, spr_write, spr_dat_i`	`spr_cs, spr_write, spr_dat_i`
`);`	`);`
Line 161...	Line 164...

`ifdef OR1200_BIST	`ifdef OR1200_BIST
`//`	`//`
`// RAM BIST`	`// RAM BIST`
`//`	`//`
`input scanb_rst,`	`input mbist_si_i;`
`scanb_si,`	input [`OR1200_MBIST_CTRL_WIDTH - 1:0] mbist_ctrl_i;
`scanb_en,`	`output mbist_so_o;`
`scanb_clk;`
`output scanb_so;`
`endif	`endif

`//`	`//`
`// SPR access`	`// SPR access`
`//`	`//`
Line 202...	Line 203...
`wire dcfsm_tag_we;`	`wire dcfsm_tag_we;`
`ifdef OR1200_BIST	`ifdef OR1200_BIST
`//`	`//`
`// RAM BIST`	`// RAM BIST`
`//`	`//`
`wire scanb_ram_so;`	`wire mbist_ram_so;`
`wire scanb_tag_so;`	`wire mbist_tag_so;`
`wire scanb_ram_si = scanb_si;`	`wire mbist_ram_si = mbist_si_i;`
`wire scanb_tag_si = scanb_ram_so;`	`wire mbist_tag_si = mbist_ram_so;`
`assign scanb_so = scanb_tag_so;`	`assign mbist_so_o = mbist_tag_so;`
`endif	`endif

`//`	`//`
`// Simple assignments`	`// Simple assignments`
`//`	`//`
Line 302...	Line 303...
`or1200_dc_ram or1200_dc_ram(`	`or1200_dc_ram or1200_dc_ram(`
`.clk(clk),`	`.clk(clk),`
`.rst(rst),`	`.rst(rst),`
`ifdef OR1200_BIST	`ifdef OR1200_BIST
`// RAM BIST`	`// RAM BIST`
`.scanb_rst(scanb_rst),`	`.mbist_si_i(mbist_ram_si),`
`.scanb_si(scanb_ram_si),`	`.mbist_so_o(mbist_ram_so),`
`.scanb_so(scanb_ram_so),`	`.mbist_ctrl_i(mbist_ctrl_i),`
`.scanb_en(scanb_en),`
`.scanb_clk(scanb_clk),`
`endif	`endif
.addr(dc_addr[`OR1200_DCINDXH:2]),	.addr(dc_addr[`OR1200_DCINDXH:2]),
`.en(dc_en),`	`.en(dc_en),`
`.we(dcram_we),`	`.we(dcram_we),`
`.datain(to_dcram),`	`.datain(to_dcram),`
Line 323...	Line 322...
`or1200_dc_tag or1200_dc_tag(`	`or1200_dc_tag or1200_dc_tag(`
`.clk(clk),`	`.clk(clk),`
`.rst(rst),`	`.rst(rst),`
`ifdef OR1200_BIST	`ifdef OR1200_BIST
`// RAM BIST`	`// RAM BIST`
`.scanb_rst(scanb_rst),`	`.mbist_si_i(mbist_tag_si),`
`.scanb_si(scanb_tag_si),`	`.mbist_so_o(mbist_tag_so),`
`.scanb_so(scanb_tag_so),`	`.mbist_ctrl_i(mbist_ctrl_i),`
`.scanb_en(scanb_en),`
`.scanb_clk(scanb_clk),`
`endif	`endif
`.addr(dctag_addr),`	`.addr(dctag_addr),`
`.en(dctag_en),`	`.en(dctag_en),`
`.we(dctag_we),`	`.we(dctag_we),`
.datain({dc_addr[31:`OR1200_DCTAGL], dctag_v}),	.datain({dc_addr[31:`OR1200_DCTAGL], dctag_v}),

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[/] [or1k/] [tags/] [rel_21/] [or1200/] [rtl/] [verilog/] [or1200_dc_top.v] - Diff between revs 1171 and 1214