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Line 42... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.9 2002/03/11 01:26:26 lampret
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// Fixed async loop. Changed multiplier type for ASIC.
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//
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// Revision 1.8 2002/02/11 04:33:17 lampret
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// Revision 1.8 2002/02/11 04:33:17 lampret
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// Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr.
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// Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr.
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//
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//
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// Revision 1.7 2002/02/01 19:56:54 lampret
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// Revision 1.7 2002/02/01 19:56:54 lampret
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// Fixed combinational loops.
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// Fixed combinational loops.
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| Line 135... |
Line 138... |
//
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//
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// Generate debug messages during simulation
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// Generate debug messages during simulation
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//
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//
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//`define OR1200_VERBOSE
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//`define OR1200_VERBOSE
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`define OR1200_ASIC
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//`define OR1200_ASIC
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////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////
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//
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//
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// Typical configuration for an ASIC
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// Typical configuration for an ASIC
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//
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//
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`ifdef OR1200_ASIC
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`ifdef OR1200_ASIC
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| Line 877... |
Line 880... |
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// DU operation commands
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// DU operation commands
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`define OR1200_DU_OP_READSPR 3'd4
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`define OR1200_DU_OP_READSPR 3'd4
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`define OR1200_DU_OP_WRITESPR 3'd5
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`define OR1200_DU_OP_WRITESPR 3'd5
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// Define if IF/LSU status is not needed by devel i/f
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`define OR1200_DU_STATUS_UNIMPLEMENTED
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/////////////////////////////////////////////////////
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/////////////////////////////////////////////////////
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//
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//
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// Programmable Interrupt Controller (PIC)
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// Programmable Interrupt Controller (PIC)
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//
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//
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