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Line 42... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.1 2002/01/03 08:16:15 lampret
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// New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.
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//
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// Revision 1.9 2001/11/12 01:45:40 lampret
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// Revision 1.9 2001/11/12 01:45:40 lampret
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// Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports.
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// Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports.
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//
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//
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// Revision 1.8 2001/10/21 17:57:16 lampret
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// Revision 1.8 2001/10/21 17:57:16 lampret
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// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF.
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// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF.
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| Line 142... |
Line 145... |
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//
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//
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// Forwarding logic for operand A register
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// Forwarding logic for operand A register
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//
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//
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always @(ex_forw or wb_forw or rf_dataa or sel_a) begin
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always @(ex_forw or wb_forw or rf_dataa or sel_a) begin
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casex (sel_a) // synopsys full_case parallel_case infer_mux
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`ifdef OR1200_ADDITIONAL_SYNOPSYS_DIRECTIVES
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casex (sel_a) // synopsys parallel_case infer_mux
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`else
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casex (sel_a) // synopsys parallel_case
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`endif
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`OR1200_SEL_EX_FORW:
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`OR1200_SEL_EX_FORW:
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muxed_a = ex_forw;
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muxed_a = ex_forw;
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`OR1200_SEL_WB_FORW:
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`OR1200_SEL_WB_FORW:
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muxed_a = wb_forw;
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muxed_a = wb_forw;
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default:
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default:
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| Line 156... |
Line 163... |
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//
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//
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// Forwarding logic for operand B register
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// Forwarding logic for operand B register
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//
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//
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always @(simm or ex_forw or wb_forw or rf_datab or sel_b) begin
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always @(simm or ex_forw or wb_forw or rf_datab or sel_b) begin
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casex (sel_b) // synopsys full_case parallel_case infer_mux
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`ifdef OR1200_ADDITIONAL_SYNOPSYS_DIRECTIVES
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casex (sel_b) // synopsys parallel_case infer_mux
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`else
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casex (sel_b) // synopsys parallel_case
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`endif
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`OR1200_SEL_IMM:
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`OR1200_SEL_IMM:
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muxed_b = simm;
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muxed_b = simm;
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`OR1200_SEL_EX_FORW:
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`OR1200_SEL_EX_FORW:
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muxed_b = ex_forw;
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muxed_b = ex_forw;
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`OR1200_SEL_WB_FORW:
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`OR1200_SEL_WB_FORW:
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