OpenCores

Rev 617	Rev 636
Line 42...	Line 42...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.4 2002/01/28 01:15:59 lampret`
	`// Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.`
	`//`
`// Revision 1.3 2002/01/18 14:21:43 lampret`	`// Revision 1.3 2002/01/18 14:21:43 lampret`
`// Fixed 'the NPC single-step fix'.`	`// Fixed 'the NPC single-step fix'.`
`//`	`//`
`// Revision 1.2 2002/01/14 06:18:22 lampret`	`// Revision 1.2 2002/01/14 06:18:22 lampret`
`// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.`	`// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.`
Line 595...	Line 598...
`OR1200_OR32_JAL:	`OR1200_OR32_JAL:
alu_op <= #1 `OR1200_ALUOP_IMM;	alu_op <= #1 `OR1200_ALUOP_IMM;

`// l.bnf`	`// l.bnf`
`OR1200_OR32_BNF:	`OR1200_OR32_BNF:
alu_op <= #1 `OR1200_ALUOP_ADD;	alu_op <= #1 `OR1200_ALUOP_NOP;

`// l.bf`	`// l.bf`
`OR1200_OR32_BF:	`OR1200_OR32_BF:
alu_op <= #1 `OR1200_ALUOP_ADD;	alu_op <= #1 `OR1200_ALUOP_NOP;

`// l.movhi`	`// l.movhi`
`OR1200_OR32_MOVHI:	`OR1200_OR32_MOVHI:
alu_op <= #1 `OR1200_ALUOP_MOVHI;	alu_op <= #1 `OR1200_ALUOP_MOVHI;

Line 42...

//////////////////////////////////////////////////////////////////////

//////////////////////////////////////////////////////////////////////

//

//

// CVS Revision History

// CVS Revision History

//

//

// $Log: not supported by cvs2svn $

// $Log: not supported by cvs2svn $

// Revision 1.4  2002/01/28 01:15:59  lampret

// Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.

//

// Revision 1.3  2002/01/18 14:21:43  lampret

// Revision 1.3  2002/01/18 14:21:43  lampret

// Fixed 'the NPC single-step fix'.

// Fixed 'the NPC single-step fix'.

//

//

// Revision 1.2  2002/01/14 06:18:22  lampret

// Revision 1.2  2002/01/14 06:18:22  lampret

// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.

// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.

Line 595...

Line 598...

            `OR1200_OR32_JAL:

            `OR1200_OR32_JAL:

              alu_op <= #1 `OR1200_ALUOP_IMM;

              alu_op <= #1 `OR1200_ALUOP_IMM;

            // l.bnf

            // l.bnf

            `OR1200_OR32_BNF:

            `OR1200_OR32_BNF:

              alu_op <= #1 `OR1200_ALUOP_ADD;

              alu_op <= #1 `OR1200_ALUOP_NOP;

            // l.bf

            // l.bf

            `OR1200_OR32_BF:

            `OR1200_OR32_BF:

              alu_op <= #1 `OR1200_ALUOP_ADD;

              alu_op <= #1 `OR1200_ALUOP_NOP;

            // l.movhi

            // l.movhi

            `OR1200_OR32_MOVHI:

            `OR1200_OR32_MOVHI:

              alu_op <= #1 `OR1200_ALUOP_MOVHI;

              alu_op <= #1 `OR1200_ALUOP_MOVHI;

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[/] [or1k/] [tags/] [rel_23/] [or1200/] [rtl/] [verilog/] [or1200_ctrl.v] - Diff between revs 617 and 636