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[/] [or1k/] [tags/] [rel_23/] [or1200/] [rtl/] [verilog/] [or1200_defines.v] - Diff between revs 1104 and 1132

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Rev 1104	Rev 1132
Line 42...	Line 42...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.31 2002/12/08 08:57:56 lampret`
	`// Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional.`
	`//`
`// Revision 1.30 2002/10/28 15:09:22 mohor`	`// Revision 1.30 2002/10/28 15:09:22 mohor`
`// Previous check-in was done by mistake.`	`// Previous check-in was done by mistake.`
`//`	`//`
`// Revision 1.29 2002/10/28 15:03:50 mohor`	`// Revision 1.29 2002/10/28 15:03:50 mohor`
`// Signal scanb_sen renamed to scanb_en.`	`// Signal scanb_sen renamed to scanb_en.`
Line 263...	Line 266...
`//`	`//`

`//`	`//`
`// Target FPGA memories`	`// Target FPGA memories`
`//`	`//`
	//`define OR1200_ALTERA_LPM
`define OR1200_XILINX_RAMB4	`define OR1200_XILINX_RAMB4
//`define OR1200_XILINX_RAM32X1D	//`define OR1200_XILINX_RAM32X1D
//`define OR1200_USE_RAM16X1D_FOR_RAM32X1D	//`define OR1200_USE_RAM16X1D_FOR_RAM32X1D

`//`	`//`
Line 483...	Line 487...
//`define OR1200_CLKDIV_4_SUPPORTED	//`define OR1200_CLKDIV_4_SUPPORTED

`//`	`//`
`// Type of register file RAM`	`// Type of register file RAM`
`//`	`//`
`// Memory macro w/ two ports (see or1200_hdtp_32x32.v)`	`// Memory macro w/ two ports (see or1200_tpram_32x32.v)`
// `define OR1200_RFRAM_TWOPORT	// `define OR1200_RFRAM_TWOPORT
`//`	`//`
`// Memory macro dual port (see or1200_hddp_32x32.v)`	`// Memory macro dual port (see or1200_dpram_32x32.v)`
`define OR1200_RFRAM_DUALPORT	`define OR1200_RFRAM_DUALPORT
`//`	`//`
`// ... otherwise generic (flip-flop based) register file`	`// Generic (flip-flop based) register file (see or1200_rfram_generic.v)`
	//`define OR1200_RFRAM_GENERIC

`//`	`//`
`// Type of mem2reg aligner to implement.`	`// Type of mem2reg aligner to implement.`
`//`	`//`
`// Once OR1200_IMPL_MEM2REG2 yielded faster`	`// Once OR1200_IMPL_MEM2REG2 yielded faster`

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[/] [or1k/] [tags/] [rel_23/] [or1200/] [rtl/] [verilog/] [or1200_defines.v] - Diff between revs 1104 and 1132