| Line 42... |
Line 42... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.3 2002/01/14 19:09:57 lampret
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// Fixed order of syscall and range exceptions.
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//
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// Revision 1.2 2002/01/14 06:18:22 lampret
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// Revision 1.2 2002/01/14 06:18:22 lampret
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// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.
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// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.
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//
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//
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// Revision 1.1 2002/01/03 08:16:15 lampret
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// Revision 1.1 2002/01/03 08:16:15 lampret
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// New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.
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// New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.
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| Line 408... |
Line 411... |
epcr <= #1 ex_dslot ? wb_pc : delayed1_ex_dslot ? id_pc : delayed2_ex_dslot ? id_pc : id_pc;
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epcr <= #1 ex_dslot ? wb_pc : delayed1_ex_dslot ? id_pc : delayed2_ex_dslot ? id_pc : id_pc;
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end
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end
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13'b0_0000_1xxx_xxxx: begin
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13'b0_0000_1xxx_xxxx: begin
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except_type <= #1 `OR1200_EXCEPT_ALIGN;
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except_type <= #1 `OR1200_EXCEPT_ALIGN;
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eear <= #1 lsu_addr;
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eear <= #1 lsu_addr;
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epcr <= #1 ex_dslot ? wb_pc : delayed1_ex_dslot ? id_pc : delayed2_ex_dslot ? id_pc : id_pc;
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epcr <= #1 ex_dslot ? wb_pc : ex_pc;
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end
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end
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13'b0_0000_01xx_xxxx: begin
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13'b0_0000_01xx_xxxx: begin
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except_type <= #1 `OR1200_EXCEPT_DTLBMISS;
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except_type <= #1 `OR1200_EXCEPT_DTLBMISS;
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eear <= #1 lsu_addr;
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eear <= #1 lsu_addr;
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epcr <= #1 ex_dslot ? wb_pc : ex_pc;
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epcr <= #1 ex_dslot ? wb_pc : ex_pc;
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