URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_23/] [or1200/] [rtl/] [verilog/] [or1200_qmem_top.v] - Diff between revs 1214 and 1219

Rev 1214	Rev 1219
Line 45...	Line 45...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.1.2.2 2003/12/09 11:46:48 simons`
	`// Mbist nameing changed, Artisan ram instance signal names fixed, some synthesis waning fixed.`
	`//`
`// Revision 1.1.2.1 2003/07/08 15:45:26 lampret`	`// Revision 1.1.2.1 2003/07/08 15:45:26 lampret`
`// Added embedded memory QMEM.`	`// Added embedded memory QMEM.`
`//`	`//`
`//`	`//`

Line 421...	Line 424...
`assign dcqmem_we_o = qmemdcpu_we_i;`	`assign dcqmem_we_o = qmemdcpu_we_i;`
`assign dcqmem_sel_o = qmemdcpu_sel_i;`	`assign dcqmem_sel_o = qmemdcpu_sel_i;`
`assign dcqmem_tag_o = qmemdcpu_tag_i;`	`assign dcqmem_tag_o = qmemdcpu_tag_i;`
`assign dcqmem_dat_o = qmemdcpu_dat_i;`	`assign dcqmem_dat_o = qmemdcpu_dat_i;`

	`ifdef OR1200_BIST
	`assign mbist_so_o = mbist_si_i;`
	`endif

`endif	`endif

`endmodule`	`endmodule`

`No newline at end of file`	`No newline at end of file`