| Line 42... |
Line 42... |
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//
|
//
|
// CVS Revision History
|
// CVS Revision History
|
//
|
//
|
// $Log: not supported by cvs2svn $
|
// $Log: not supported by cvs2svn $
|
|
// Revision 1.10.4.1 2003/07/08 15:36:37 lampret
|
|
// Added embedded memory QMEM.
|
|
//
|
// Revision 1.10 2002/12/08 08:57:56 lampret
|
// Revision 1.10 2002/12/08 08:57:56 lampret
|
// Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional.
|
// Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional.
|
//
|
//
|
// Revision 1.9 2002/10/17 20:04:41 lampret
|
// Revision 1.9 2002/10/17 20:04:41 lampret
|
// Added BIST scan. Special VS RAMs need to be used to implement BIST.
|
// Added BIST scan. Special VS RAMs need to be used to implement BIST.
|
| Line 291... |
Line 294... |
wire icbiu_cyc_ic;
|
wire icbiu_cyc_ic;
|
wire icbiu_stb_ic;
|
wire icbiu_stb_ic;
|
wire icbiu_we_ic;
|
wire icbiu_we_ic;
|
wire [3:0] icbiu_sel_ic;
|
wire [3:0] icbiu_sel_ic;
|
wire [3:0] icbiu_tag_ic;
|
wire [3:0] icbiu_tag_ic;
|
|
wire icbiu_cab_ic;
|
wire [dw-1:0] icbiu_dat_biu;
|
wire [dw-1:0] icbiu_dat_biu;
|
wire icbiu_ack_biu;
|
wire icbiu_ack_biu;
|
wire icbiu_err_biu;
|
wire icbiu_err_biu;
|
wire [3:0] icbiu_tag_biu;
|
wire [3:0] icbiu_tag_biu;
|
|
|
| Line 325... |
Line 329... |
//
|
//
|
// CPU and data memory subsystem
|
// CPU and data memory subsystem
|
//
|
//
|
wire dc_en;
|
wire dc_en;
|
wire [31:0] dcpu_adr_cpu;
|
wire [31:0] dcpu_adr_cpu;
|
|
wire dcpu_cycstb_cpu;
|
wire dcpu_we_cpu;
|
wire dcpu_we_cpu;
|
wire [3:0] dcpu_sel_cpu;
|
wire [3:0] dcpu_sel_cpu;
|
wire [3:0] dcpu_tag_cpu;
|
wire [3:0] dcpu_tag_cpu;
|
wire [31:0] dcpu_dat_cpu;
|
wire [31:0] dcpu_dat_cpu;
|
wire [31:0] dcpu_dat_qmem;
|
wire [31:0] dcpu_dat_qmem;
|
| Line 354... |
Line 359... |
wire [31:0] icpu_dat_qmem;
|
wire [31:0] icpu_dat_qmem;
|
wire icpu_ack_qmem;
|
wire icpu_ack_qmem;
|
wire [31:0] icpu_adr_immu;
|
wire [31:0] icpu_adr_immu;
|
wire icpu_err_immu;
|
wire icpu_err_immu;
|
wire [3:0] icpu_tag_immu;
|
wire [3:0] icpu_tag_immu;
|
|
wire icpu_rty_immu;
|
|
|
//
|
//
|
// IMMU and QMEM
|
// IMMU and QMEM
|
//
|
//
|
wire [aw-1:0] qmemimmu_adr_immu;
|
wire [aw-1:0] qmemimmu_adr_immu;
|
