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[/] [or1k/] [tags/] [rel_26/] [or1200/] [rtl/] [verilog/] [or1200_freeze.v] - Diff between revs 562 and 617

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Rev 562 Rev 617
Line 42... Line 42...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.2  2002/01/14 06:18:22  lampret
 
// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.
 
//
// Revision 1.1  2002/01/03 08:16:15  lampret
// Revision 1.1  2002/01/03 08:16:15  lampret
// New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.
// New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.
//
//
// Revision 1.10  2001/11/13 10:02:21  lampret
// Revision 1.10  2001/11/13 10:02:21  lampret
// Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc)
// Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc)
Line 89... Line 92...
        clk, rst,
        clk, rst,
 
 
        // Internal i/f
        // Internal i/f
        multicycle, flushpipe, extend_flush, lsu_stall, if_stall,
        multicycle, flushpipe, extend_flush, lsu_stall, if_stall,
        lsu_unstall, du_stall, mac_stall,
        lsu_unstall, du_stall, mac_stall,
        force_dslot_fetch,
        force_dslot_fetch, abort_ex,
        genpc_freeze, if_freeze, id_freeze, ex_freeze, wb_freeze
        genpc_freeze, if_freeze, id_freeze, ex_freeze, wb_freeze
);
);
 
 
//
//
// I/O
// I/O
Line 105... Line 108...
input                           extend_flush;
input                           extend_flush;
input                           lsu_stall;
input                           lsu_stall;
input                           if_stall;
input                           if_stall;
input                           lsu_unstall;
input                           lsu_unstall;
input                           force_dslot_fetch;
input                           force_dslot_fetch;
 
input                           abort_ex;
input                           du_stall;
input                           du_stall;
input                           mac_stall;
input                           mac_stall;
output                          genpc_freeze;
output                          genpc_freeze;
output                          if_freeze;
output                          if_freeze;
output                          id_freeze;
output                          id_freeze;
Line 138... Line 142...
assign if_freeze = id_freeze | extend_flush;
assign if_freeze = id_freeze | extend_flush;
//assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) & ~flushpipe | du_stall;
//assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) & ~flushpipe | du_stall;
assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) | du_stall;
assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) | du_stall;
assign ex_freeze = wb_freeze;
assign ex_freeze = wb_freeze;
//assign wb_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze) & ~flushpipe | du_stall | mac_stall;
//assign wb_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze) & ~flushpipe | du_stall | mac_stall;
assign wb_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze) | du_stall | mac_stall;
assign wb_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze) | du_stall | mac_stall | abort_ex;
 
 
//
//
// Multicycle freeze
// Multicycle freeze
//
//
assign multicycle_freeze = |multicycle_cnt;
assign multicycle_freeze = |multicycle_cnt;

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