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[/] [or1k/] [tags/] [rel_26/] [or1200/] [rtl/] [verilog/] [or1200_genpc.v] - Diff between revs 1163 and 1171

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Rev 1163 Rev 1171
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//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.7  2003/04/20 22:23:57  lampret
 
// No functional change. Only added customization for exception vectors.
 
//
// Revision 1.6  2002/03/29 15:16:55  lampret
// Revision 1.6  2002/03/29 15:16:55  lampret
// Some of the warnings fixed.
// Some of the warnings fixed.
//
//
// Revision 1.5  2002/02/11 04:33:17  lampret
// Revision 1.5  2002/02/11 04:33:17  lampret
// Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr.
// Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr.
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//
//
always @(pcreg or branch_addrofs or binsn_addr or flag or branch_op or except_type
always @(pcreg or branch_addrofs or binsn_addr or flag or branch_op or except_type
        or except_start or lr_restor or epcr or spr_pc_we or spr_dat_i or except_prefix) begin
        or except_start or lr_restor or epcr or spr_pc_we or spr_dat_i or except_prefix) begin
        casex ({spr_pc_we, except_start, branch_op})    // synopsys parallel_case
        casex ({spr_pc_we, except_start, branch_op})    // synopsys parallel_case
                {2'b00, `OR1200_BRANCHOP_NOP}: begin
                {2'b00, `OR1200_BRANCHOP_NOP}: begin
                        pc = {pcreg + 'd1, 2'b0};
                        pc = {pcreg + 1'd1, 2'b0};
                        taken = 1'b0;
                        taken = 1'b0;
                end
                end
                {2'b00, `OR1200_BRANCHOP_J}: begin
                {2'b00, `OR1200_BRANCHOP_J}: begin
`ifdef OR1200_VERBOSE
`ifdef OR1200_VERBOSE
// synopsys translate_off
// synopsys translate_off
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`ifdef OR1200_VERBOSE
`ifdef OR1200_VERBOSE
// synopsys translate_off
// synopsys translate_off
                                $display("%t: BRANCHOP_BF: not taken", $time);
                                $display("%t: BRANCHOP_BF: not taken", $time);
// synopsys translate_on
// synopsys translate_on
`endif
`endif
                                pc = {pcreg + 'd1, 2'b0};
                                pc = {pcreg + 1'd1, 2'b0};
                                taken = 1'b0;
                                taken = 1'b0;
                        end
                        end
                {2'b00, `OR1200_BRANCHOP_BNF}:
                {2'b00, `OR1200_BRANCHOP_BNF}:
                        if (flag) begin
                        if (flag) begin
                                pc = {pcreg + 'd1, 2'b0};
                                pc = {pcreg + 1'd1, 2'b0};
`ifdef OR1200_VERBOSE
`ifdef OR1200_VERBOSE
// synopsys translate_off
// synopsys translate_off
                                $display("%t: BRANCHOP_BNF: not taken", $time);
                                $display("%t: BRANCHOP_BNF: not taken", $time);
// synopsys translate_on
// synopsys translate_on
`endif
`endif

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