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[/] [or1k/] [tags/] [rel_26/] [or1200/] [rtl/] [verilog/] [or1200_top.v] - Diff between revs 1209 and 1214

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Rev 1209	Rev 1214
Line 42...	Line 42...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.10.4.3 2003/12/05 00:08:44 lampret`
	`// Fixed instantiation name.`
	`//`
`// Revision 1.10.4.2 2003/07/11 01:10:35 lampret`	`// Revision 1.10.4.2 2003/07/11 01:10:35 lampret`
`// Added three missing wire declarations. No functional changes.`	`// Added three missing wire declarations. No functional changes.`
`//`	`//`
`// Revision 1.10.4.1 2003/07/08 15:36:37 lampret`	`// Revision 1.10.4.1 2003/07/08 15:36:37 lampret`
`// Added embedded memory QMEM.`	`// Added embedded memory QMEM.`
Line 144...	Line 147...
`dbg_stall_i, dbg_dat_i, dbg_adr_i, dbg_op_i, dbg_ewt_i,`	`dbg_stall_i, dbg_dat_i, dbg_adr_i, dbg_op_i, dbg_ewt_i,`
`dbg_lss_o, dbg_is_o, dbg_wp_o, dbg_bp_o, dbg_dat_o,`	`dbg_lss_o, dbg_is_o, dbg_wp_o, dbg_bp_o, dbg_dat_o,`

`ifdef OR1200_BIST	`ifdef OR1200_BIST
`// RAM BIST`	`// RAM BIST`
`scanb_rst, scanb_si, scanb_so, scanb_en, scanb_clk,`	`mbist_si_i, mbist_so_o, mbist_ctrl_i,`
`endif	`endif
`// Power Management`	`// Power Management`
`pm_cpustall_i,`	`pm_cpustall_i,`
`pm_clksd_o, pm_dc_gate_o, pm_ic_gate_o, pm_dmmu_gate_o,`	`pm_clksd_o, pm_dc_gate_o, pm_ic_gate_o, pm_dmmu_gate_o,`
`pm_immu_gate_o, pm_tt_gate_o, pm_cpu_gate_o, pm_wakeup_o, pm_lvolt_o`	`pm_immu_gate_o, pm_tt_gate_o, pm_cpu_gate_o, pm_wakeup_o, pm_lvolt_o`
Line 233...	Line 236...

`ifdef OR1200_BIST	`ifdef OR1200_BIST
`//`	`//`
`// RAM BIST`	`// RAM BIST`
`//`	`//`
`input scanb_rst,`	`input mbist_si_i;`
`scanb_si,`	input [`OR1200_MBIST_CTRL_WIDTH - 1:0] mbist_ctrl_i;
`scanb_en,`	`output mbist_so_o;`
`scanb_clk;`
`output scanb_so;`
`endif	`endif

`//`	`//`
`// Power Management`	`// Power Management`
`//`	`//`
Line 442...	Line 443...

`ifdef OR1200_BIST	`ifdef OR1200_BIST
`//`	`//`
`// RAM BIST`	`// RAM BIST`
`//`	`//`
`wire scanb_immu_so;`	`wire mbist_immu_so;`
`wire scanb_ic_so;`	`wire mbist_ic_so;`
`wire scanb_dmmu_so;`	`wire mbist_dmmu_so;`
`wire scanb_dc_so;`	`wire mbist_dc_so;`
`wire scanb_immu_si = scanb_si;`	`wire mbist_qmem_so;`
`wire scanb_ic_si = scanb_immu_so;`	`wire mbist_immu_si = mbist_si_i;`
`wire scanb_qmem_si = scanb_ic_so;`	`wire mbist_ic_si = mbist_immu_so;`
`wire scanb_dmmu_si = scanb_qmem_so;`	`wire mbist_qmem_si = mbist_ic_so;`
`wire scanb_dc_si = scanb_dmmu_so;`	`wire mbist_dmmu_si = mbist_qmem_so;`
`assign scanb_so = scanb_dc_so;`	`wire mbist_dc_si = mbist_dmmu_so;`
`endif	`assign mbist_so_o = mbist_dc_so;`
	`endif

	`wire [3:0] icqmem_sel_qmem;`
	`wire [3:0] icqmem_tag_qmem;`
	`wire [3:0] dcqmem_tag_qmem;`

`//`	`//`
`// Instantiation of Instruction WISHBONE BIU`	`// Instantiation of Instruction WISHBONE BIU`
`//`	`//`
`or1200_iwb_biu iwb_biu(`	`or1200_iwb_biu iwb_biu(`
Line 551...	Line 556...
`.clk(clk_i),`	`.clk(clk_i),`
`.rst(rst_i),`	`.rst(rst_i),`

`ifdef OR1200_BIST	`ifdef OR1200_BIST
`// RAM BIST`	`// RAM BIST`
`.scanb_rst(scanb_rst),`	`.mbist_si_i(mbist_immu_si),`
`.scanb_si(scanb_immu_si),`	`.mbist_so_o(mbist_immu_so),`
`.scanb_so(scanb_immu_so),`	`.mbist_ctrl_i(mbist_ctrl_i),`
`.scanb_en(scanb_en),`
`.scanb_clk(scanb_clk),`
`endif	`endif

`// CPU and IMMU`	`// CPU and IMMU`
`.ic_en(ic_en),`	`.ic_en(ic_en),`
`.immu_en(immu_en),`	`.immu_en(immu_en),`
Line 594...	Line 597...
`.clk(clk_i),`	`.clk(clk_i),`
`.rst(rst_i),`	`.rst(rst_i),`

`ifdef OR1200_BIST	`ifdef OR1200_BIST
`// RAM BIST`	`// RAM BIST`
`.scanb_rst(scanb_rst),`	`.mbist_si_i(mbist_ic_si),`
`.scanb_si(scanb_ic_si),`	`.mbist_so_o(mbist_ic_so),`
`.scanb_so(scanb_ic_so),`	`.mbist_ctrl_i(mbist_ctrl_i),`
`.scanb_en(scanb_en),`
`.scanb_clk(scanb_clk),`
`endif	`endif

`// IC and QMEM`	`// IC and QMEM`
`.ic_en(ic_en),`	`.ic_en(ic_en),`
`.icqmem_adr_i(icqmem_adr_qmem),`	`.icqmem_adr_i(icqmem_adr_qmem),`
Line 716...	Line 717...
`.clk(clk_i),`	`.clk(clk_i),`
`.rst(rst_i),`	`.rst(rst_i),`

`ifdef OR1200_BIST	`ifdef OR1200_BIST
`// RAM BIST`	`// RAM BIST`
`.scanb_rst(scanb_rst),`	`.mbist_si_i(mbist_dmmu_si),`
`.scanb_si(scanb_dmmu_si),`	`.mbist_so_o(mbist_dmmu_so),`
`.scanb_so(scanb_dmmu_so),`	`.mbist_ctrl_i(mbist_ctrl_i),`
`.scanb_en(scanb_en),`
`.scanb_clk(scanb_clk),`
`endif	`endif

`// CPU i/f`	`// CPU i/f`
`.dc_en(dc_en),`	`.dc_en(dc_en),`
`.dmmu_en(dmmu_en),`	`.dmmu_en(dmmu_en),`
Line 757...	Line 756...
`.clk(clk_i),`	`.clk(clk_i),`
`.rst(rst_i),`	`.rst(rst_i),`

`ifdef OR1200_BIST	`ifdef OR1200_BIST
`// RAM BIST`	`// RAM BIST`
`.scanb_rst(scanb_rst),`	`.mbist_si_i(mbist_dc_si),`
`.scanb_si(scanb_dc_si),`	`.mbist_so_o(mbist_dc_so),`
`.scanb_so(scanb_dc_so),`	`.mbist_ctrl_i(mbist_ctrl_i),`
`.scanb_en(scanb_en),`
`.scanb_clk(scanb_clk),`
`endif	`endif

`// DC and QMEM`	`// DC and QMEM`
`.dc_en(dc_en),`	`.dc_en(dc_en),`
`.dcqmem_adr_i(dcqmem_adr_qmem),`	`.dcqmem_adr_i(dcqmem_adr_qmem),`
Line 806...	Line 803...
`.clk(clk_i),`	`.clk(clk_i),`
`.rst(rst_i),`	`.rst(rst_i),`

`ifdef OR1200_BIST	`ifdef OR1200_BIST
`// RAM BIST`	`// RAM BIST`
`.scanb_rst(scanb_rst),`	`.mbist_si_i(mbist_qmem_si),`
`.scanb_si(scanb_qmem_si),`	`.mbist_so_o(mbist_qmem_so),`
`.scanb_so(scanb_qmem_so),`	`.mbist_ctrl_i(mbist_ctrl_i),`
`.scanb_en(scanb_en),`
`.scanb_clk(scanb_clk),`
`endif	`endif

`// QMEM and CPU/IMMU`	`// QMEM and CPU/IMMU`
`.qmemimmu_adr_i(qmemimmu_adr_immu),`	`.qmemimmu_adr_i(qmemimmu_adr_immu),`
`.qmemimmu_cycstb_i(qmemimmu_cycstb_immu),`	`.qmemimmu_cycstb_i(qmemimmu_cycstb_immu),`

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[/] [or1k/] [tags/] [rel_26/] [or1200/] [rtl/] [verilog/] [or1200_top.v] - Diff between revs 1209 and 1214