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[/] [or1k/] [tags/] [rel_29/] [or1200/] [rtl/] [verilog/] [or1200_cpu.v] - Diff between revs 1032 and 1208

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Rev 1032 Rev 1208
Line 43... Line 43...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.12  2002/09/07 05:42:02  lampret
 
// Added optional SR[CY]. Added define to enable additional (compare) flag modifiers. Defines are OR1200_IMPL_ADDC and OR1200_ADDITIONAL_FLAG_MODIFIERS.
 
//
// Revision 1.11  2002/08/28 01:44:25  lampret
// Revision 1.11  2002/08/28 01:44:25  lampret
// Removed some commented RTL. Fixed SR/ESR flag bug.
// Removed some commented RTL. Fixed SR/ESR flag bug.
//
//
// Revision 1.10  2002/07/14 22:17:17  lampret
// Revision 1.10  2002/07/14 22:17:17  lampret
// Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized.
// Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized.
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wire    [`OR1200_MACOP_WIDTH-1:0] mac_op;
wire    [`OR1200_MACOP_WIDTH-1:0] mac_op;
wire    [31:0]                   mult_mac_result;
wire    [31:0]                   mult_mac_result;
wire                            mac_stall;
wire                            mac_stall;
wire    [12:0]                   except_stop;
wire    [12:0]                   except_stop;
wire                            genpc_refetch;
wire                            genpc_refetch;
 
wire                            genpc_stop_refetch;
wire                            rfe;
wire                            rfe;
wire                            lsu_unstall;
wire                            lsu_unstall;
wire                            except_align;
wire                            except_align;
wire                            except_dtlbmiss;
wire                            except_dtlbmiss;
wire                            except_dmmufault;
wire                            except_dmmufault;
Line 403... Line 407...
        .binsn_addr(lr_sav),
        .binsn_addr(lr_sav),
        .epcr(epcr),
        .epcr(epcr),
        .spr_dat_i(spr_dat_cpu),
        .spr_dat_i(spr_dat_cpu),
        .spr_pc_we(pc_we),
        .spr_pc_we(pc_we),
        .genpc_refetch(genpc_refetch),
        .genpc_refetch(genpc_refetch),
 
        .genpc_stop_prefetch(genpc_stop_prefetch),
        .genpc_freeze(genpc_freeze),
        .genpc_freeze(genpc_freeze),
        .no_more_dslot(no_more_dslot)
        .no_more_dslot(no_more_dslot)
);
);
 
 
//
//
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        .if_pc(if_pc),
        .if_pc(if_pc),
        .flushpipe(flushpipe),
        .flushpipe(flushpipe),
        .if_stall(if_stall),
        .if_stall(if_stall),
        .no_more_dslot(no_more_dslot),
        .no_more_dslot(no_more_dslot),
        .genpc_refetch(genpc_refetch),
        .genpc_refetch(genpc_refetch),
 
        .genpc_stop_prefetch(genpc_stop_prefetch),
        .rfe(rfe),
        .rfe(rfe),
        .except_itlbmiss(except_itlbmiss),
        .except_itlbmiss(except_itlbmiss),
        .except_immufault(except_immufault),
        .except_immufault(except_immufault),
        .except_ibuserr(except_ibuserr)
        .except_ibuserr(except_ibuserr)
);
);

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