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https://opencores.org/ocsvn/or1k/or1k/trunk
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| Rev 895 |
Rev 1011 |
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Line 43... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.10 2002/07/14 22:17:17 lampret
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// Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized.
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//
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// Revision 1.9 2002/03/29 16:29:37 lampret
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// Revision 1.9 2002/03/29 16:29:37 lampret
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// Fixed some ports in instnatiations that were removed from the modules
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// Fixed some ports in instnatiations that were removed from the modules
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//
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//
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// Revision 1.8 2002/03/29 15:16:54 lampret
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// Revision 1.8 2002/03/29 15:16:54 lampret
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// Some of the warnings fixed.
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// Some of the warnings fixed.
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Line 304... |
wire esr_we;
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wire esr_we;
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wire pc_we;
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wire pc_we;
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wire [31:0] epcr;
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wire [31:0] epcr;
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wire [31:0] eear;
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wire [31:0] eear;
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wire [`OR1200_SR_WIDTH-1:0] esr;
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wire [`OR1200_SR_WIDTH-1:0] esr;
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wire sr_we;
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wire [`OR1200_SR_WIDTH-1:0] to_sr;
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wire [`OR1200_SR_WIDTH-1:0] sr;
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wire [`OR1200_SR_WIDTH-1:0] sr;
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wire except_start;
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wire except_start;
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wire except_started;
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wire except_started;
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wire [31:0] wb_insn;
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wire [31:0] wb_insn;
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wire [15:0] spr_addrimm;
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wire [15:0] spr_addrimm;
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| Line 596... |
Line 601... |
.epcr(epcr),
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.epcr(epcr),
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.eear(eear),
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.eear(eear),
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.esr(esr),
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.esr(esr),
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.except_started(except_started),
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.except_started(except_started),
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.sr_we(sr_we),
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.to_sr(to_sr),
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.sr(sr),
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.sr(sr),
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.branch_op(branch_op)
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.branch_op(branch_op)
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);
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);
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//
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//
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Line 731... |
.epcr(epcr),
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.epcr(epcr),
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.eear(eear),
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.eear(eear),
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.esr(esr),
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.esr(esr),
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.lsu_addr(dcpu_adr_o),
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.lsu_addr(dcpu_adr_o),
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.sr_we(sr_we),
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.to_sr(to_sr),
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.sr(sr),
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.sr(sr),
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.abort_ex(abort_ex)
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.abort_ex(abort_ex)
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);
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);
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//
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//
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