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URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [gen_or1k_isa/] [sources/] [or32.c] - Diff between revs 1342 and 1346

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Rev 1342 Rev 1346
Line 18... Line 18...
along with this program; if not, write to the Free Software
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
 
/*
/*
 * $Log: not supported by cvs2svn $
 * $Log: not supported by cvs2svn $
 
 * Revision 1.39  2005/01/27 13:35:40  nogj
 
 *  * Fix generate.c to produce a execgen.c with less warnings.
 
 *  * Fix the --enable-simple configure option.
 
 *
 * Revision 1.38  2005/01/27 13:15:50  nogj
 * Revision 1.38  2005/01/27 13:15:50  nogj
 * Mark wich operand is the destination operand in the architechture definition
 * Mark wich operand is the destination operand in the architechture definition
 *
 *
 * Revision 1.37  2005/01/11 15:41:58  andreje
 * Revision 1.37  2005/01/11 15:41:58  andreje
 * l.ff1 instruction added
 * l.ff1 instruction added
Line 112... Line 116...
#endif /* HAS_EXECUTION */
#endif /* HAS_EXECUTION */
 
 
CONST struct or32_opcode or32_opcodes[] =
CONST struct or32_opcode or32_opcodes[] =
{
{
 
 
{ "l.j",       "N",            "00 0x0  NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_j), OR32_IF_DELAY },
{ "l.j",       "N",            "00 0x0  NNNNN NNNNN NNNN NNNN NNNN NNNN",
{ "l.jal",     "N",            "00 0x1  NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_jal), OR32_IF_DELAY },
  EF(l_j), OR32_IF_DELAY, it_jump },
{ "l.bnf",     "N",            "00 0x3  NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bnf), OR32_IF_DELAY | OR32_R_FLAG},
{ "l.jal",     "N",            "00 0x1  NNNNN NNNNN NNNN NNNN NNNN NNNN",
{ "l.bf",      "N",            "00 0x4  NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bf), OR32_IF_DELAY | OR32_R_FLAG },
  EF(l_jal), OR32_IF_DELAY, it_jump },
{ "l.nop",     "K",            "00 0x5  01--- ----- KKKK KKKK KKKK KKKK", EF(l_nop), 0 },
{ "l.bnf",     "N",            "00 0x3  NNNNN NNNNN NNNN NNNN NNNN NNNN",
{ "l.movhi",   "rD,K",         "00 0x6  DDDDD ----0 KKKK KKKK KKKK KKKK", EF(l_movhi), 0 }, /*MM*/
  EF(l_bnf), OR32_IF_DELAY | OR32_R_FLAG, it_branch },
{ "l.macrc",   "rD",           "00 0x6  DDDDD ----1 0000 0000 0000 0000", EF(l_macrc), 0 }, /*MM*/
{ "l.bf",      "N",            "00 0x4  NNNNN NNNNN NNNN NNNN NNNN NNNN",
 
  EF(l_bf), OR32_IF_DELAY | OR32_R_FLAG, it_branch },
{ "l.sys",     "K",            "00 0x8  00000 00000 KKKK KKKK KKKK KKKK", EF(l_sys), 0 },
{ "l.nop",     "K",            "00 0x5  01--- ----- KKKK KKKK KKKK KKKK",
{ "l.trap",    "K",            "00 0x8  01000 00000 KKKK KKKK KKKK KKKK", EF(l_trap), 0 }, /* CZ 21/06/01 */
  EF(l_nop), 0, it_nop },
{ "l.msync",   "",             "00 0x8  10000 00000 0000 0000 0000 0000", EFN, 0 },
{ "l.movhi",   "rD,K",         "00 0x6  DDDDD ----0 KKKK KKKK KKKK KKKK",
{ "l.psync",   "",             "00 0x8  10100 00000 0000 0000 0000 0000", EFN, 0 },
  EF(l_movhi), 0, it_movimm },
{ "l.csync",   "",             "00 0x8  11000 00000 0000 0000 0000 0000", EFN, 0 },
{ "l.macrc",   "rD",           "00 0x6  DDDDD ----1 0000 0000 0000 0000",
{ "l.rfe",     "",             "00 0x9  ----- ----- ---- ---- ---- ----", EF(l_rfe), OR32_IF_DELAY },
  EF(l_macrc), 0, it_mac },
 
{ "l.sys",     "K",            "00 0x8  00000 00000 KKKK KKKK KKKK KKKK",
{ "lv.all_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
  EF(l_sys), 0, it_unknown },
{ "lv.all_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
{ "l.trap",    "K",            "00 0x8  01000 00000 KKKK KKKK KKKK KKKK",
{ "lv.all_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 },
  EF(l_trap), 0, it_unknown },
{ "lv.all_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 },
{ "l.msync",   "",             "00 0x8  10000 00000 0000 0000 0000 0000", EFN,
{ "lv.all_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 },
  0, it_unknown },
{ "lv.all_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 },
{ "l.psync",   "",             "00 0x8  10100 00000 0000 0000 0000 0000", EFN,
{ "lv.all_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 },
  0, it_unknown },
{ "lv.all_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 },
{ "l.csync",   "",             "00 0x8  11000 00000 0000 0000 0000 0000", EFN,
{ "lv.all_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x8", EFI, 0 },
  0, it_unknown },
{ "lv.all_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x9", EFI, 0 },
{ "l.rfe",     "",             "00 0x9  ----- ----- ---- ---- ---- ----",
{ "lv.all_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xA", EFI, 0 },
  EF(l_rfe), OR32_IF_DELAY, it_exception },
{ "lv.all_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xB", EFI, 0 },
{ "lv.all_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0,
{ "lv.any_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x0", EFI, 0 },
  it_unknown },
{ "lv.any_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x1", EFI, 0 },
{ "lv.all_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0,
{ "lv.any_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x2", EFI, 0 },
  it_unknown },
{ "lv.any_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x3", EFI, 0 },
{ "lv.all_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0,
{ "lv.any_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x4", EFI, 0 },
  it_unknown },
{ "lv.any_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x5", EFI, 0 },
{ "lv.all_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0,
{ "lv.any_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x6", EFI, 0 },
  it_unknown },
{ "lv.any_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x7", EFI, 0 },
{ "lv.all_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0,
{ "lv.any_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x8", EFI, 0 },
  it_unknown },
{ "lv.any_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x9", EFI, 0 },
{ "lv.all_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0,
{ "lv.any_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xA", EFI, 0 },
  it_unknown },
{ "lv.any_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xB", EFI, 0 },
{ "lv.all_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0,
{ "lv.add.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x0", EFI, 0 },
  it_unknown },
{ "lv.add.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x1", EFI, 0 },
{ "lv.all_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0,
{ "lv.adds.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x2", EFI, 0 },
  it_unknown },
{ "lv.adds.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x3", EFI, 0 },
{ "lv.all_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x8", EFI, 0,
{ "lv.addu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x4", EFI, 0 },
  it_unknown },
{ "lv.addu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x5", EFI, 0 },
{ "lv.all_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x9", EFI, 0,
{ "lv.addus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x6", EFI, 0 },
  it_unknown },
{ "lv.addus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x7", EFI, 0 },
{ "lv.all_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xA", EFI, 0,
{ "lv.and",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x8", EFI, 0 },
  it_unknown },
{ "lv.avg.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x9", EFI, 0 },
{ "lv.all_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xB", EFI, 0,
{ "lv.avg.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0xA", EFI, 0 },
  it_unknown },
{ "lv.cmp_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x0", EFI, 0 },
{ "lv.any_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x0", EFI, 0,
{ "lv.cmp_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x1", EFI, 0 },
  it_unknown },
{ "lv.cmp_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x2", EFI, 0 },
{ "lv.any_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x1", EFI, 0,
{ "lv.cmp_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x3", EFI, 0 },
  it_unknown },
{ "lv.cmp_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x4", EFI, 0 },
{ "lv.any_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x2", EFI, 0,
{ "lv.cmp_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x5", EFI, 0 },
  it_unknown },
{ "lv.cmp_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x6", EFI, 0 },
{ "lv.any_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x3", EFI, 0,
{ "lv.cmp_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x7", EFI, 0 },
  it_unknown },
{ "lv.cmp_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x8", EFI, 0 },
{ "lv.any_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x4", EFI, 0,
{ "lv.cmp_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x9", EFI, 0 },
  it_unknown },
{ "lv.cmp_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xA", EFI, 0 },
{ "lv.any_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x5", EFI, 0,
{ "lv.cmp_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xB", EFI, 0 },
  it_unknown },
{ "lv.madds.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x4", EFI, 0 },
{ "lv.any_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x6", EFI, 0,
{ "lv.max.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x5", EFI, 0 },
  it_unknown },
{ "lv.max.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x6", EFI, 0 },
{ "lv.any_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x7", EFI, 0,
{ "lv.merge.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x7", EFI, 0 },
  it_unknown },
{ "lv.merge.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x8", EFI, 0 },
{ "lv.any_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x8", EFI, 0,
{ "lv.min.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x9", EFI, 0 },
  it_unknown },
{ "lv.min.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xA", EFI, 0 },
{ "lv.any_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x9", EFI, 0,
{ "lv.msubs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xB", EFI, 0 },
  it_unknown },
{ "lv.muls.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xC", EFI, 0 },
{ "lv.any_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xA", EFI, 0,
{ "lv.nand",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xD", EFI, 0 },
  it_unknown },
{ "lv.nor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xE", EFI, 0 },
{ "lv.any_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xB", EFI, 0,
{ "lv.or",     "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xF", EFI, 0 },
  it_unknown },
{ "lv.pack.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x0", EFI, 0 },
{ "lv.add.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x0", EFI, 0,
{ "lv.pack.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x1", EFI, 0 },
  it_unknown },
{ "lv.packs.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x2", EFI, 0 },
{ "lv.add.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x1", EFI, 0,
{ "lv.packs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x3", EFI, 0 },
  it_unknown },
{ "lv.packus.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x4", EFI, 0 },
{ "lv.adds.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x2", EFI, 0,
{ "lv.packus.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x5", EFI, 0 },
  it_unknown },
{ "lv.perm.n", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x6", EFI, 0 },
{ "lv.adds.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x3", EFI, 0,
{ "lv.rl.b",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x7", EFI, 0 },
  it_unknown },
{ "lv.rl.h",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x8", EFI, 0 },
{ "lv.addu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x4", EFI, 0,
{ "lv.sll.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x9", EFI, 0 },
  it_unknown },
{ "lv.sll.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xA", EFI, 0 },
{ "lv.addu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x5", EFI, 0,
{ "lv.sll",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xB", EFI, 0 },
  it_unknown },
{ "lv.srl.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xC", EFI, 0 },
{ "lv.addus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x6", EFI, 0,
{ "lv.srl.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xD", EFI, 0 },
  it_unknown },
{ "lv.sra.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xE", EFI, 0 },
{ "lv.addus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x7", EFI, 0,
{ "lv.sra.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xF", EFI, 0 },
  it_unknown },
{ "lv.srl",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x0", EFI, 0 },
{ "lv.and",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x8", EFI, 0,
{ "lv.sub.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x1", EFI, 0 },
  it_unknown },
{ "lv.sub.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x2", EFI, 0 },
{ "lv.avg.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x9", EFI, 0,
{ "lv.subs.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x3", EFI, 0 },
  it_unknown },
{ "lv.subs.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x4", EFI, 0 },
{ "lv.avg.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0xA", EFI, 0,
{ "lv.subu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x5", EFI, 0 },
  it_unknown },
{ "lv.subu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x6", EFI, 0 },
{ "lv.cmp_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x0", EFI, 0,
{ "lv.subus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x7", EFI, 0 },
  it_unknown },
{ "lv.subus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x8", EFI, 0 },
{ "lv.cmp_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x1", EFI, 0,
{ "lv.unpack.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x9", EFI, 0 },
  it_unknown },
{ "lv.unpack.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xA", EFI, 0 },
{ "lv.cmp_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x2", EFI, 0,
{ "lv.xor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xB", EFI, 0 },
  it_unknown },
{ "lv.cust1",  "",             "00 0xA  ----- ----- ---- ---- 0xC ----", EFI, 0 },
{ "lv.cmp_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x3", EFI, 0,
{ "lv.cust2",  "",             "00 0xA  ----- ----- ---- ---- 0xD ----", EFI, 0 },
  it_unknown },
{ "lv.cust3",  "",             "00 0xA  ----- ----- ---- ---- 0xE ----", EFI, 0 },
{ "lv.cmp_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x4", EFI, 0,
{ "lv.cust4",  "",             "00 0xA  ----- ----- ---- ---- 0xF ----", EFI, 0 },
  it_unknown },
 
{ "lv.cmp_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x5", EFI, 0,
{ "l.jr",      "rB",           "01 0x1  ----- ----- BBBB B--- ---- ----", EF(l_jr), OR32_IF_DELAY },
  it_unknown },
{ "l.jalr",    "rB",           "01 0x2  ----- ----- BBBB B--- ---- ----", EF(l_jalr), OR32_IF_DELAY },
{ "lv.cmp_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x6", EFI, 0,
{ "l.maci",    "rB,I",         "01 0x3  IIIII ----- BBBB BIII IIII IIII", EF(l_mac), 0 },
  it_unknown },
{ "l.cust1",   "",             "01 0xC  ----- ----- ---- ---- ---- ----", EF(l_cust1), 0 },
{ "lv.cmp_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x7", EFI, 0,
{ "l.cust2",   "",             "01 0xD  ----- ----- ---- ---- ---- ----", EF(l_cust2), 0 },
  it_unknown },
{ "l.cust3",   "",             "01 0xE  ----- ----- ---- ---- ---- ----", EF(l_cust3), 0 },
{ "lv.cmp_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x8", EFI, 0,
{ "l.cust4",   "",             "01 0xF  ----- ----- ---- ---- ---- ----", EF(l_cust4), 0 },
  it_unknown },
 
{ "lv.cmp_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x9", EFI, 0,
{ "l.ld",      "rD,I(rA)",     "10 0x0  DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
  it_unknown },
{ "l.lwz",     "rD,I(rA)",     "10 0x1  DDDDD AAAAA IIII IIII IIII IIII", EF(l_lwz), 0 },
{ "lv.cmp_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xA", EFI, 0,
{ "l.lws",     "rD,I(rA)",     "10 0x2  DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
  it_unknown },
{ "l.lbz",     "rD,I(rA)",     "10 0x3  DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbz), 0 },
{ "lv.cmp_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xB", EFI, 0,
{ "l.lbs",     "rD,I(rA)",     "10 0x4  DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbs), 0 },
  it_unknown },
{ "l.lhz",     "rD,I(rA)",     "10 0x5  DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhz), 0 },
{ "lv.madds.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x4", EFI, 0,
{ "l.lhs",     "rD,I(rA)",     "10 0x6  DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhs), 0 },
  it_unknown },
 
{ "lv.max.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x5", EFI, 0,
{ "l.addi",    "rD,rA,I",      "10 0x7  DDDDD AAAAA IIII IIII IIII IIII", EF(l_add), OR32_W_FLAG },
  it_unknown },
{ "l.addic",   "rD,rA,I",      "10 0x8  DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
{ "lv.max.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x6", EFI, 0,
{ "l.andi",    "rD,rA,K",      "10 0x9  DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_and), OR32_W_FLAG },
  it_unknown },
{ "l.ori",     "rD,rA,K",      "10 0xA  DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_or), 0  },
{ "lv.merge.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x7", EFI, 0,
{ "l.xori",    "rD,rA,I",      "10 0xB  DDDDD AAAAA IIII IIII IIII IIII", EF(l_xor), 0 },
  it_unknown },
{ "l.muli",    "rD,rA,I",      "10 0xC  DDDDD AAAAA IIII IIII IIII IIII", EF(l_mul), 0 },
{ "lv.merge.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x8", EFI, 0,
{ "l.mfspr",   "rD,rA,K",      "10 0xD  DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_mfspr), 0 },
  it_unknown },
{ "l.slli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 00LL LLLL", EF(l_sll), 0 },
{ "lv.min.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x9", EFI, 0,
{ "l.srli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 01LL LLLL", EF(l_srl), 0 },
  it_unknown },
{ "l.srai",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 10LL LLLL", EF(l_sra), 0 },
{ "lv.min.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xA", EFI, 0,
{ "l.rori",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 11LL LLLL", EFI, 0 },
  it_unknown },
 
{ "lv.msubs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xB", EFI, 0,
{ "l.sfeqi",   "rA,I",         "10 0xF  00000 AAAAA IIII IIII IIII IIII", EF(l_sfeq), OR32_W_FLAG },
  it_unknown },
{ "l.sfnei",   "rA,I",         "10 0xF  00001 AAAAA IIII IIII IIII IIII", EF(l_sfne), OR32_W_FLAG },
{ "lv.muls.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xC", EFI, 0,
{ "l.sfgtui",  "rA,I",         "10 0xF  00010 AAAAA IIII IIII IIII IIII", EF(l_sfgtu), OR32_W_FLAG },
  it_unknown },
{ "l.sfgeui",  "rA,I",         "10 0xF  00011 AAAAA IIII IIII IIII IIII", EF(l_sfgeu), OR32_W_FLAG },
{ "lv.nand",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xD", EFI, 0,
{ "l.sfltui",  "rA,I",         "10 0xF  00100 AAAAA IIII IIII IIII IIII", EF(l_sfltu), OR32_W_FLAG },
  it_unknown },
{ "l.sfleui",  "rA,I",         "10 0xF  00101 AAAAA IIII IIII IIII IIII", EF(l_sfleu), OR32_W_FLAG },
{ "lv.nor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xE", EFI, 0,
{ "l.sfgtsi",  "rA,I",         "10 0xF  01010 AAAAA IIII IIII IIII IIII", EF(l_sfgts), OR32_W_FLAG },
  it_unknown },
{ "l.sfgesi",  "rA,I",         "10 0xF  01011 AAAAA IIII IIII IIII IIII", EF(l_sfges), OR32_W_FLAG },
{ "lv.or",     "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xF", EFI, 0,
{ "l.sfltsi",  "rA,I",         "10 0xF  01100 AAAAA IIII IIII IIII IIII", EF(l_sflts), OR32_W_FLAG },
  it_unknown },
{ "l.sflesi",  "rA,I",         "10 0xF  01101 AAAAA IIII IIII IIII IIII", EF(l_sfles), OR32_W_FLAG },
{ "lv.pack.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x0", EFI, 0,
 
  it_unknown },
{ "l.mtspr",   "rA,rB,K",      "11 0x0  KKKKK AAAAA BBBB BKKK KKKK KKKK", EF(l_mtspr), 0 },
{ "lv.pack.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x1", EFI, 0,
{ "l.mac",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x1", EF(l_mac), 0 }, /*MM*/
  it_unknown },
{ "l.msb",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x2", EF(l_msb), 0 }, /*MM*/
{ "lv.packs.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x2", EFI, 0,
 
  it_unknown },
{ "lf.add.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x0", EF(lf_add_s), 0 },
{ "lv.packs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x3", EFI, 0,
{ "lf.sub.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x1", EF(lf_sub_s), 0 },
  it_unknown },
{ "lf.mul.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x2", EF(lf_mul_s), 0 },
{ "lv.packus.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x4", EFI, 0,
{ "lf.div.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x3", EF(lf_div_s), 0 },
  it_unknown },
{ "lf.itof.s",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x0 0x4", EF(lf_itof_s), 0 },
{ "lv.packus.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x5", EFI, 0,
{ "lf.ftoi.s",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x0 0x5", EF(lf_ftoi_s), 0 },
  it_unknown },
{ "lf.rem.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x6", EF(lf_rem_s), 0 },
{ "lv.perm.n", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x6", EFI, 0,
{ "lf.madd.s",  "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x7", EF(lf_madd_s), 0 },
  it_unknown },
{ "lf.sfeq.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0x8", EF(lf_sfeq_s), 0 },
{ "lv.rl.b",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x7", EFI, 0,
{ "lf.sfne.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0x9", EF(lf_sfne_s), 0 },
  it_unknown },
{ "lf.sfgt.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xA", EF(lf_sfgt_s), 0 },
{ "lv.rl.h",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x8", EFI, 0,
{ "lf.sfge.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xB", EF(lf_sfge_s), 0 },
  it_unknown },
{ "lf.sflt.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xC", EF(lf_sflt_s), 0 },
{ "lv.sll.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x9", EFI, 0,
{ "lf.sfle.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xD", EF(lf_sfle_s), 0 },
  it_unknown },
{ "lf.cust1.s", "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0xD ----", EFI, 0 },
{ "lv.sll.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xA", EFI, 0,
 
  it_unknown },
{ "lf.add.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
{ "lv.sll",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xB", EFI, 0,
{ "lf.sub.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
  it_unknown },
{ "lf.mul.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 },
{ "lv.srl.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xC", EFI, 0,
{ "lf.div.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 },
  it_unknown },
{ "lf.itof.d",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x1 0x4", EFI, 0 },
{ "lv.srl.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xD", EFI, 0,
{ "lf.ftoi.d",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x1 0x5", EFI, 0 },
  it_unknown },
{ "lf.rem.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 },
{ "lv.sra.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xE", EFI, 0,
{ "lf.madd.d",  "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 },
  it_unknown },
{ "lf.sfeq.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0 },
{ "lv.sra.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xF", EFI, 0,
{ "lf.sfne.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0 },
  it_unknown },
{ "lf.sfgt.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0 },
{ "lv.srl",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x0", EFI, 0,
{ "lf.sfge.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0 },
  it_unknown },
{ "lf.sflt.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0 },
{ "lv.sub.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x1", EFI, 0,
{ "lf.sfle.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0 },
  it_unknown },
{ "lf.cust1.d", "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0xE ----", EFI, 0 },
{ "lv.sub.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x2", EFI, 0,
 
  it_unknown },
{ "l.sd",      "I(rD),rB",     "11 0x4  IIIII DDDDD BBBB BIII IIII IIII", EFI, 0 },
{ "lv.subs.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x3", EFI, 0,
{ "l.sw",      "I(rD),rB",     "11 0x5  IIIII DDDDD BBBB BIII IIII IIII", EF(l_sw), 0 },
  it_unknown },
{ "l.sb",      "I(rD),rB",     "11 0x6  IIIII DDDDD BBBB BIII IIII IIII", EF(l_sb), 0 },
{ "lv.subs.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x4", EFI, 0,
{ "l.sh",      "I(rD),rB",     "11 0x7  IIIII DDDDD BBBB BIII IIII IIII", EF(l_sh), 0 },
  it_unknown },
 
{ "lv.subu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x5", EFI, 0,
{ "l.add",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), OR32_W_FLAG },
  it_unknown },
{ "l.addc",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x1", EF(l_addc), OR32_W_FLAG },
{ "lv.subu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x6", EFI, 0,
{ "l.sub",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0 },
  it_unknown },
{ "l.and",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), OR32_W_FLAG },
{ "lv.subus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x7", EFI, 0,
{ "l.or",      "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0 },
  it_unknown },
{ "l.xor",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x5", EF(l_xor), 0 },
{ "lv.subus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x8", EFI, 0,
{ "l.mul",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x6", EF(l_mul), 0 },
  it_unknown },
 
{ "lv.unpack.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x9", EFI, 0,
{ "l.sll",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 00-- 0x8", EF(l_sll), 0 },
  it_unknown },
{ "l.srl",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 01-- 0x8", EF(l_srl), 0 },
{ "lv.unpack.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xA", EFI, 0,
{ "l.sra",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 10-- 0x8", EF(l_sra), 0 },
  it_unknown },
{ "l.ror",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 11-- 0x8", EFI, 0 },
{ "lv.xor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xB", EFI, 0,
{ "l.div",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x9", EF(l_div), 0 },
  it_unknown },
{ "l.divu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xA", EF(l_divu), 0 },
{ "lv.cust1",  "",             "00 0xA  ----- ----- ---- ---- 0xC ----", EFI, 0,
{ "l.mulu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xB", EFI, 0 },
  it_unknown },
{ "l.extbs",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xC", EF(l_extbs), 0 },
{ "lv.cust2",  "",             "00 0xA  ----- ----- ---- ---- 0xD ----", EFI, 0,
{ "l.exths",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xC", EF(l_exths), 0 },
  it_unknown },
{ "l.extws",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xD", EF(l_extws), 0 },
{ "lv.cust3",  "",             "00 0xA  ----- ----- ---- ---- 0xE ----", EFI, 0,
{ "l.extbz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 11-- 0xC", EF(l_extbz), 0 },
  it_unknown },
{ "l.exthz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 10-- 0xC", EF(l_exthz), 0 },
{ "lv.cust4",  "",             "00 0xA  ----- ----- ---- ---- 0xF ----", EFI, 0,
{ "l.extwz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xD", EF(l_extwz), 0 },
  it_unknown },
{ "l.cmov",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0xE", EF(l_cmov), OR32_R_FLAG },
 
{ "l.ff1",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0xF", EF(l_ff1), 0 },
{ "l.jr",      "rB",           "01 0x1  ----- ----- BBBB B--- ---- ----",
 
  EF(l_jr), OR32_IF_DELAY, it_jump },
{ "l.sfeq",    "rA,rB",        "11 0x9  00000 AAAAA BBBB B--- ---- ----", EF(l_sfeq), OR32_W_FLAG },
{ "l.jalr",    "rB",           "01 0x2  ----- ----- BBBB B--- ---- ----",
{ "l.sfne",    "rA,rB",        "11 0x9  00001 AAAAA BBBB B--- ---- ----", EF(l_sfne), OR32_W_FLAG },
  EF(l_jalr), OR32_IF_DELAY, it_jump },
{ "l.sfgtu",   "rA,rB",        "11 0x9  00010 AAAAA BBBB B--- ---- ----", EF(l_sfgtu), OR32_W_FLAG },
{ "l.maci",    "rB,I",         "01 0x3  IIIII ----- BBBB BIII IIII IIII",
{ "l.sfgeu",   "rA,rB",        "11 0x9  00011 AAAAA BBBB B--- ---- ----", EF(l_sfgeu), OR32_W_FLAG },
  EF(l_mac), 0, it_mac },
{ "l.sfltu",   "rA,rB",        "11 0x9  00100 AAAAA BBBB B--- ---- ----", EF(l_sfltu), OR32_W_FLAG },
{ "l.cust1",   "",             "01 0xC  ----- ----- ---- ---- ---- ----",
{ "l.sfleu",   "rA,rB",        "11 0x9  00101 AAAAA BBBB B--- ---- ----", EF(l_sfleu), OR32_W_FLAG },
  EF(l_cust1), 0, it_unknown },
{ "l.sfgts",   "rA,rB",        "11 0x9  01010 AAAAA BBBB B--- ---- ----", EF(l_sfgts), OR32_W_FLAG },
{ "l.cust2",   "",             "01 0xD  ----- ----- ---- ---- ---- ----",
{ "l.sfges",   "rA,rB",        "11 0x9  01011 AAAAA BBBB B--- ---- ----", EF(l_sfges), OR32_W_FLAG },
  EF(l_cust2), 0, it_unknown },
{ "l.sflts",   "rA,rB",        "11 0x9  01100 AAAAA BBBB B--- ---- ----", EF(l_sflts), OR32_W_FLAG },
{ "l.cust3",   "",             "01 0xE  ----- ----- ---- ---- ---- ----",
{ "l.sfles",   "rA,rB",        "11 0x9  01101 AAAAA BBBB B--- ---- ----", EF(l_sfles), OR32_W_FLAG },
  EF(l_cust3), 0, it_unknown },
 
{ "l.cust4",   "",             "01 0xF  ----- ----- ---- ---- ---- ----",
{ "l.cust5",   "rD,rA,rB,L,K", "11 0xC  DDDDD AAAAA BBBB BLLL LLLK KKKK", EFI, 0 },
  EF(l_cust4), 0, it_unknown },
{ "l.cust6",   "",             "11 0xD  ----- ----- ---- ---- ---- ----", EFI, 0 },
 
{ "l.cust7",   "",             "11 0xE  ----- ----- ---- ---- ---- ----", EFI, 0 },
{ "l.ld",      "rD,I(rA)",     "10 0x0  DDDDD AAAAA IIII IIII IIII IIII", EFI,
{ "l.cust8",   "",             "11 0xF  ----- ----- ---- ---- ---- ----", EFI, 0 },
  0, it_load },
 
{ "l.lwz",     "rD,I(rA)",     "10 0x1  DDDDD AAAAA IIII IIII IIII IIII",
 
  EF(l_lwz), 0, it_load },
 
{ "l.lws",     "rD,I(rA)",     "10 0x2  DDDDD AAAAA IIII IIII IIII IIII", EFI,
 
  0, it_load },
 
{ "l.lbz",     "rD,I(rA)",     "10 0x3  DDDDD AAAAA IIII IIII IIII IIII",
 
  EF(l_lbz), 0, it_load },
 
{ "l.lbs",     "rD,I(rA)",     "10 0x4  DDDDD AAAAA IIII IIII IIII IIII",
 
  EF(l_lbs), 0, it_load },
 
{ "l.lhz",     "rD,I(rA)",     "10 0x5  DDDDD AAAAA IIII IIII IIII IIII",
 
  EF(l_lhz), 0, it_load },
 
{ "l.lhs",     "rD,I(rA)",     "10 0x6  DDDDD AAAAA IIII IIII IIII IIII",
 
  EF(l_lhs), 0, it_load },
 
 
 
{ "l.addi",    "rD,rA,I",      "10 0x7  DDDDD AAAAA IIII IIII IIII IIII",
 
  EF(l_add), OR32_W_FLAG, it_arith },
 
{ "l.addic",   "rD,rA,I",      "10 0x8  DDDDD AAAAA IIII IIII IIII IIII", EFI,
 
  0, it_arith },
 
{ "l.andi",    "rD,rA,K",      "10 0x9  DDDDD AAAAA KKKK KKKK KKKK KKKK",
 
  EF(l_and), OR32_W_FLAG, it_arith },
 
{ "l.ori",     "rD,rA,K",      "10 0xA  DDDDD AAAAA KKKK KKKK KKKK KKKK",
 
  EF(l_or), 0, it_arith },
 
{ "l.xori",    "rD,rA,I",      "10 0xB  DDDDD AAAAA IIII IIII IIII IIII",
 
  EF(l_xor), 0, it_arith },
 
{ "l.muli",    "rD,rA,I",      "10 0xC  DDDDD AAAAA IIII IIII IIII IIII",
 
  EF(l_mul), 0, it_arith },
 
{ "l.mfspr",   "rD,rA,K",      "10 0xD  DDDDD AAAAA KKKK KKKK KKKK KKKK",
 
  EF(l_mfspr), 0, it_move },
 
{ "l.slli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 00LL LLLL",
 
  EF(l_sll), 0, it_shift },
 
{ "l.srli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 01LL LLLL",
 
  EF(l_srl), 0, it_shift },
 
{ "l.srai",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 10LL LLLL",
 
  EF(l_sra), 0, it_shift },
 
{ "l.rori",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 11LL LLLL", EFI,
 
  0, it_shift },
 
 
 
{ "l.sfeqi",   "rA,I",         "10 0xF  00000 AAAAA IIII IIII IIII IIII",
 
  EF(l_sfeq), OR32_W_FLAG, it_compare },
 
{ "l.sfnei",   "rA,I",         "10 0xF  00001 AAAAA IIII IIII IIII IIII",
 
  EF(l_sfne), OR32_W_FLAG, it_compare },
 
{ "l.sfgtui",  "rA,I",         "10 0xF  00010 AAAAA IIII IIII IIII IIII",
 
  EF(l_sfgtu), OR32_W_FLAG, it_compare },
 
{ "l.sfgeui",  "rA,I",         "10 0xF  00011 AAAAA IIII IIII IIII IIII",
 
  EF(l_sfgeu), OR32_W_FLAG, it_compare },
 
{ "l.sfltui",  "rA,I",         "10 0xF  00100 AAAAA IIII IIII IIII IIII",
 
  EF(l_sfltu), OR32_W_FLAG, it_compare },
 
{ "l.sfleui",  "rA,I",         "10 0xF  00101 AAAAA IIII IIII IIII IIII",
 
  EF(l_sfleu), OR32_W_FLAG, it_compare },
 
{ "l.sfgtsi",  "rA,I",         "10 0xF  01010 AAAAA IIII IIII IIII IIII",
 
  EF(l_sfgts), OR32_W_FLAG, it_compare },
 
{ "l.sfgesi",  "rA,I",         "10 0xF  01011 AAAAA IIII IIII IIII IIII",
 
  EF(l_sfges), OR32_W_FLAG, it_compare },
 
{ "l.sfltsi",  "rA,I",         "10 0xF  01100 AAAAA IIII IIII IIII IIII",
 
  EF(l_sflts), OR32_W_FLAG, it_compare },
 
{ "l.sflesi",  "rA,I",         "10 0xF  01101 AAAAA IIII IIII IIII IIII",
 
  EF(l_sfles), OR32_W_FLAG, it_compare },
 
 
 
{ "l.mtspr",   "rA,rB,K",      "11 0x0  KKKKK AAAAA BBBB BKKK KKKK KKKK",
 
  EF(l_mtspr), 0, it_move },
 
{ "l.mac",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x1",
 
  EF(l_mac), 0, it_mac },
 
{ "l.msb",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x2",
 
  EF(l_msb), 0, it_mac },
 
 
 
{ "lf.add.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x0",
 
  EF(lf_add_s), 0, it_float },
 
{ "lf.sub.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x1",
 
  EF(lf_sub_s), 0, it_float },
 
{ "lf.mul.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x2",
 
  EF(lf_mul_s), 0, it_float },
 
{ "lf.div.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x3",
 
  EF(lf_div_s), 0, it_float },
 
{ "lf.itof.s",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x0 0x4",
 
  EF(lf_itof_s), 0, it_float },
 
{ "lf.ftoi.s",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x0 0x5",
 
  EF(lf_ftoi_s), 0, it_float },
 
{ "lf.rem.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x6",
 
  EF(lf_rem_s), 0, it_float },
 
{ "lf.madd.s",  "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x7",
 
  EF(lf_madd_s), 0, it_float },
 
{ "lf.sfeq.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0x8",
 
  EF(lf_sfeq_s), 0, it_float },
 
{ "lf.sfne.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0x9",
 
  EF(lf_sfne_s), 0, it_float },
 
{ "lf.sfgt.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xA",
 
  EF(lf_sfgt_s), 0, it_float },
 
{ "lf.sfge.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xB",
 
  EF(lf_sfge_s), 0, it_float },
 
{ "lf.sflt.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xC",
 
  EF(lf_sflt_s), 0, it_float },
 
{ "lf.sfle.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xD",
 
  EF(lf_sfle_s), 0, it_float },
 
{ "lf.cust1.s", "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0xD ----", EFI,
 
  0, it_float },
 
 
 
{ "lf.add.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0,
 
  it_float },
 
{ "lf.sub.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0,
 
  it_float },
 
{ "lf.mul.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0,
 
  it_float },
 
{ "lf.div.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0,
 
  it_float },
 
{ "lf.itof.d",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x1 0x4", EFI, 0,
 
  it_float },
 
{ "lf.ftoi.d",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x1 0x5", EFI, 0,
 
  it_float },
 
{ "lf.rem.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0,
 
  it_float },
 
{ "lf.madd.d",  "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0,
 
  it_float },
 
{ "lf.sfeq.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0,
 
  it_float },
 
{ "lf.sfne.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0,
 
  it_float },
 
{ "lf.sfgt.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0,
 
  it_float },
 
{ "lf.sfge.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0,
 
  it_float },
 
{ "lf.sflt.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0,
 
  it_float },
 
{ "lf.sfle.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0,
 
  it_float },
 
{ "lf.cust1.d", "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0xE ----", EFI, 0,
 
  it_float },
 
 
 
{ "l.sd",      "I(rD),rB",     "11 0x4  IIIII DDDDD BBBB BIII IIII IIII", EFI,
 
  0, it_store },
 
{ "l.sw",      "I(rD),rB",     "11 0x5  IIIII DDDDD BBBB BIII IIII IIII",
 
  EF(l_sw), 0, it_store },
 
{ "l.sb",      "I(rD),rB",     "11 0x6  IIIII DDDDD BBBB BIII IIII IIII",
 
  EF(l_sb), 0, it_store },
 
{ "l.sh",      "I(rD),rB",     "11 0x7  IIIII DDDDD BBBB BIII IIII IIII",
 
  EF(l_sh), 0, it_store },
 
 
 
{ "l.add",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x0",
 
  EF(l_add), OR32_W_FLAG, it_arith },
 
{ "l.addc",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x1",
 
  EF(l_addc), OR32_W_FLAG, it_arith },
 
{ "l.sub",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x2",
 
  EF(l_sub), 0, it_arith },
 
{ "l.and",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x3",
 
  EF(l_and), OR32_W_FLAG, it_arith },
 
{ "l.or",      "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x4",
 
  EF(l_or), 0, it_arith },
 
{ "l.xor",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x5",
 
  EF(l_xor), 0, it_arith },
 
{ "l.mul",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x6",
 
  EF(l_mul), 0, it_arith },
 
 
 
{ "l.sll",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 00-- 0x8",
 
  EF(l_sll), 0, it_shift },
 
{ "l.srl",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 01-- 0x8",
 
  EF(l_srl), 0, it_shift },
 
{ "l.sra",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 10-- 0x8",
 
  EF(l_sra), 0, it_shift },
 
{ "l.ror",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 11-- 0x8", EFI,
 
  0, it_shift },
 
{ "l.div",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x9",
 
  EF(l_div), 0, it_arith },
 
{ "l.divu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xA",
 
  EF(l_divu), 0, it_arith },
 
{ "l.mulu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xB", EFI,
 
  0, it_arith },
 
{ "l.extbs",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xC",
 
  EF(l_extbs), 0, it_move },
 
{ "l.exths",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xC",
 
  EF(l_exths), 0, it_move },
 
{ "l.extws",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xD",
 
  EF(l_extws), 0, it_move },
 
{ "l.extbz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 11-- 0xC",
 
  EF(l_extbz), 0, it_move },
 
{ "l.exthz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 10-- 0xC",
 
  EF(l_exthz), 0, it_move },
 
{ "l.extwz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xD",
 
  EF(l_extwz), 0, it_move },
 
{ "l.cmov",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0xE",
 
  EF(l_cmov), OR32_R_FLAG, it_move },
 
{ "l.ff1",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0xF", EFI,
 
  0, it_arith },
 
 
 
{ "l.sfeq",    "rA,rB",        "11 0x9  00000 AAAAA BBBB B--- ---- ----",
 
  EF(l_sfeq), OR32_W_FLAG, it_compare },
 
{ "l.sfne",    "rA,rB",        "11 0x9  00001 AAAAA BBBB B--- ---- ----",
 
  EF(l_sfne), OR32_W_FLAG, it_compare },
 
{ "l.sfgtu",   "rA,rB",        "11 0x9  00010 AAAAA BBBB B--- ---- ----",
 
  EF(l_sfgtu), OR32_W_FLAG, it_compare },
 
{ "l.sfgeu",   "rA,rB",        "11 0x9  00011 AAAAA BBBB B--- ---- ----",
 
  EF(l_sfgeu), OR32_W_FLAG, it_compare },
 
{ "l.sfltu",   "rA,rB",        "11 0x9  00100 AAAAA BBBB B--- ---- ----",
 
  EF(l_sfltu), OR32_W_FLAG, it_compare },
 
{ "l.sfleu",   "rA,rB",        "11 0x9  00101 AAAAA BBBB B--- ---- ----",
 
  EF(l_sfleu), OR32_W_FLAG, it_compare },
 
{ "l.sfgts",   "rA,rB",        "11 0x9  01010 AAAAA BBBB B--- ---- ----",
 
  EF(l_sfgts), OR32_W_FLAG, it_compare },
 
{ "l.sfges",   "rA,rB",        "11 0x9  01011 AAAAA BBBB B--- ---- ----",
 
  EF(l_sfges), OR32_W_FLAG, it_compare },
 
{ "l.sflts",   "rA,rB",        "11 0x9  01100 AAAAA BBBB B--- ---- ----",
 
  EF(l_sflts), OR32_W_FLAG, it_compare },
 
{ "l.sfles",   "rA,rB",        "11 0x9  01101 AAAAA BBBB B--- ---- ----",
 
  EF(l_sfles), OR32_W_FLAG, it_compare },
 
 
 
{ "l.cust5",   "rD,rA,rB,L,K", "11 0xC  DDDDD AAAAA BBBB BLLL LLLK KKKK", EFI,
 
  0, it_unknown },
 
{ "l.cust6",   "",             "11 0xD  ----- ----- ---- ---- ---- ----", EFI,
 
  0, it_unknown },
 
{ "l.cust7",   "",             "11 0xE  ----- ----- ---- ---- ---- ----", EFI,
 
  0, it_unknown },
 
{ "l.cust8",   "",             "11 0xF  ----- ----- ---- ---- ---- ----", EFI,
 
  0, it_unknown },
 
 
/* This section should not be defined in or1ksim, since it contains duplicates,
/* This section should not be defined in or1ksim, since it contains duplicates,
   which would cause machine builder to complain.  */
   which would cause machine builder to complain.  */
#ifdef HAS_CUST
#ifdef HAS_CUST
{ "l.cust5_1",   "rD",         "11 0xC  DDDDD ----- ---- ---- ---- ----", EFI, 0 },
{ "l.cust5_1",   "rD",         "11 0xC  DDDDD ----- ---- ---- ---- ----", EFI,
{ "l.cust5_2",   "rD,rA"   ,   "11 0xC  DDDDD AAAAA ---- ---- ---- ----", EFI, 0 },
  0, it_unknown },
{ "l.cust5_3",   "rD,rA,rB",   "11 0xC  DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 },
{ "l.cust5_2",   "rD,rA"   ,   "11 0xC  DDDDD AAAAA ---- ---- ---- ----", EFI,
 
  0, it_unknown },
{ "l.cust6_1",   "rD",         "11 0xD  DDDDD ----- ---- ---- ---- ----", EFI, 0 },
{ "l.cust5_3",   "rD,rA,rB",   "11 0xC  DDDDD AAAAA BBBB B--- ---- ----", EFI,
{ "l.cust6_2",   "rD,rA"   ,   "11 0xD  DDDDD AAAAA ---- ---- ---- ----", EFI, 0 },
  0, it_unknown },
{ "l.cust6_3",   "rD,rA,rB",   "11 0xD  DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 },
 
 
{ "l.cust6_1",   "rD",         "11 0xD  DDDDD ----- ---- ---- ---- ----", EFI,
{ "l.cust7_1",   "rD",         "11 0xE  DDDDD ----- ---- ---- ---- ----", EFI, 0 },
  0, it_unknown },
{ "l.cust7_2",   "rD,rA"   ,   "11 0xE  DDDDD AAAAA ---- ---- ---- ----", EFI, 0 },
{ "l.cust6_2",   "rD,rA"   ,   "11 0xD  DDDDD AAAAA ---- ---- ---- ----", EFI,
{ "l.cust7_3",   "rD,rA,rB",   "11 0xE  DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 },
  0, it_unknown },
 
{ "l.cust6_3",   "rD,rA,rB",   "11 0xD  DDDDD AAAAA BBBB B--- ---- ----", EFI,
{ "l.cust8_1",   "rD",         "11 0xF  DDDDD ----- ---- ---- ---- ----", EFI, 0 },
  0, it_unknown },
{ "l.cust8_2",   "rD,rA"   ,   "11 0xF  DDDDD AAAAA ---- ---- ---- ----", EFI, 0 },
 
{ "l.cust8_3",   "rD,rA,rB",   "11 0xF  DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 },
{ "l.cust7_1",   "rD",         "11 0xE  DDDDD ----- ---- ---- ---- ----", EFI,
 
  0, it_unknown },
 
{ "l.cust7_2",   "rD,rA"   ,   "11 0xE  DDDDD AAAAA ---- ---- ---- ----", EFI,
 
  0, it_unknown },
 
{ "l.cust7_3",   "rD,rA,rB",   "11 0xE  DDDDD AAAAA BBBB B--- ---- ----", EFI,
 
  0, it_unknown },
 
 
 
{ "l.cust8_1",   "rD",         "11 0xF  DDDDD ----- ---- ---- ---- ----", EFI,
 
  0, it_unknown },
 
{ "l.cust8_2",   "rD,rA"   ,   "11 0xF  DDDDD AAAAA ---- ---- ---- ----", EFI,
 
  0, it_unknown },
 
{ "l.cust8_3",   "rD,rA,rB",   "11 0xF  DDDDD AAAAA BBBB B--- ---- ----", EFI,
 
  0, it_unknown },
#endif
#endif
 
 
{ "", "", "", EFI, 0 }           /* Dummy entry, not included in num_opcodes.  This
{ "", "", "", EFI, 0, 0 }  /* Dummy entry, not included in num_opcodes.  This
                           lets code examine entry i+1 without checking
                            * lets code examine entry i+1 without checking
                           if we've run off the end of the table.  */
                            * if we've run off the end of the table.  */
};
};
 
 
#undef EFI
#undef EFI
#undef EFN
#undef EFN
#undef EF 
#undef EF 
Line 639... Line 865...
static struct insn_op_struct *
static struct insn_op_struct *
parse_params (CONST struct or32_opcode *opcode, struct insn_op_struct *cur)
parse_params (CONST struct or32_opcode *opcode, struct insn_op_struct *cur)
{
{
  char *args = opcode->args;
  char *args = opcode->args;
  int i, type;
  int i, type;
 
  int num_cur_op = 0;;
 
 
  i = 0;
  i = 0;
  type = 0;
  type = 0;
  /* In case we don't have any parameters, we add dummy read from r0.  */
  /* In case we don't have any parameters, we add dummy read from r0.  */
  if (!(*args)) {
  if (!(*args)) {
Line 671... Line 898...
            {
            {
              type |= OPTYPE_SIG;
              type |= OPTYPE_SIG;
              type |= ((num_ones (arg) - 1) << OPTYPE_SBIT_SHR) & OPTYPE_SBIT;
              type |= ((num_ones (arg) - 1) << OPTYPE_SBIT_SHR) & OPTYPE_SBIT;
            }
            }
 
 
 
          num_cur_op = 0;
          /* Split argument to sequences of consecutive ones.  */
          /* Split argument to sequences of consecutive ones.  */
          while (arg)
          while (arg)
            {
            {
              int shr = 0;
              int shr = 0;
              unsigned long tmp = arg, mask = 0;
              unsigned long tmp = arg, mask = 0;
Line 691... Line 919...
              cur->type = type | shr;
              cur->type = type | shr;
              cur->data = mask;
              cur->data = mask;
              arg &= ~(((1 << mask) - 1) << shr);
              arg &= ~(((1 << mask) - 1) << shr);
              debug(6, "|%08X %08X\n", cur->type, cur->data);
              debug(6, "|%08X %08X\n", cur->type, cur->data);
              cur++;
              cur++;
 
              num_cur_op++;
            }
            }
          args++;
          args++;
        }
        }
      else if (*args == '(')
      else if (*args == '(')
        {
        {
          /* Next param is displacement.  Later we will treat them as one operand.  */
          /* Next param is displacement.  Later we will treat them as one operand.  */
          cur--;
          /* Set the OPTYPE_DIS flag on all insn_op_structs that belong to this
          cur->type = type | cur->type | OPTYPE_DIS | OPTYPE_OP;
           * operand */
 
          while(num_cur_op > 0) {
 
            cur[-num_cur_op].type |= type | OPTYPE_DIS;
 
            num_cur_op--;
 
          }
 
          cur[-1].type |= OPTYPE_OP;
          debug(9, ">%08X %08X\n", cur->type, cur->data);
          debug(9, ">%08X %08X\n", cur->type, cur->data);
          cur++;
 
          type = 0;
          type = 0;
          i++;
          i++;
          args++;
          args++;
        }
        }
      else if (*args == OPERAND_DELIM)
      else if (*args == OPERAND_DELIM)

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