| Line 56... |
Line 56... |
} way[MAX_IC_WAYS];
|
} way[MAX_IC_WAYS];
|
} ic[MAX_IC_SETS];
|
} ic[MAX_IC_SETS];
|
|
|
void ic_info()
|
void ic_info()
|
{
|
{
|
if (!testsprbits(SPR_UPR, SPR_UPR_ICP)) {
|
if (!(cpu_state.sprs[SPR_UPR] & SPR_UPR_ICP)) {
|
PRINTF("ICache not implemented. Set UPR[ICP].\n");
|
PRINTF("ICache not implemented. Set UPR[ICP].\n");
|
return;
|
return;
|
}
|
}
|
|
|
PRINTF("Instruction cache %dKB: ", config.ic.nsets * config.ic.blocksize * config.ic.nways / 1024);
|
PRINTF("Instruction cache %dKB: ", config.ic.nsets * config.ic.blocksize * config.ic.nways / 1024);
|
| Line 86... |
Line 86... |
int i;
|
int i;
|
oraddr_t tagaddr;
|
oraddr_t tagaddr;
|
uint32_t tmp;
|
uint32_t tmp;
|
|
|
/* ICache simulation enabled/disabled. */
|
/* ICache simulation enabled/disabled. */
|
if ((!testsprbits(SPR_UPR, SPR_UPR_ICP)) || (!testsprbits(SPR_SR, SPR_SR_ICE)) || insn_ci) {
|
if (!(cpu_state.sprs[SPR_UPR] & SPR_UPR_ICP) ||
|
|
!(cpu_state.sprs[SPR_SR] & SPR_SR_ICE) || insn_ci) {
|
tmp = evalsim_mem32(fetchaddr, virt_addr);
|
tmp = evalsim_mem32(fetchaddr, virt_addr);
|
if (cur_area && cur_area->log)
|
if (cur_area && cur_area->log)
|
fprintf (cur_area->log, "[%"PRIxADDR"] -> read %08"PRIx32"\n", fetchaddr,
|
fprintf (cur_area->log, "[%"PRIxADDR"] -> read %08"PRIx32"\n", fetchaddr,
|
tmp);
|
tmp);
|
return tmp;
|
return tmp;
|
| Line 162... |
Line 163... |
{
|
{
|
int set, way = -1;
|
int set, way = -1;
|
int i;
|
int i;
|
oraddr_t tagaddr;
|
oraddr_t tagaddr;
|
|
|
if (!testsprbits(SPR_UPR, SPR_UPR_ICP))
|
if (!(cpu_state.sprs[SPR_UPR] & SPR_UPR_ICP))
|
return;
|
return;
|
|
|
/* Which set to check out? */
|
/* Which set to check out? */
|
set = (dataaddr / config.ic.blocksize) % config.ic.nsets;
|
set = (dataaddr / config.ic.blocksize) % config.ic.nsets;
|
tagaddr = (dataaddr / config.ic.blocksize) / config.ic.nsets;
|
tagaddr = (dataaddr / config.ic.blocksize) / config.ic.nsets;
|
|
|
if (!testsprbits(SPR_SR, SPR_SR_ICE)) {
|
if (!(cpu_state.sprs[SPR_SR] & SPR_SR_ICE)) {
|
for (i = 0; i < config.ic.nways; i++) {
|
for (i = 0; i < config.ic.nways; i++) {
|
ic[set].way[i].tagaddr = -1;
|
ic[set].way[i].tagaddr = -1;
|
ic[set].way[i].lru = 0;
|
ic[set].way[i].lru = 0;
|
}
|
}
|
return;
|
return;
|
| Line 193... |
Line 194... |
|
|
/*-----------------------------------------------------[ IC configuration ]---*/
|
/*-----------------------------------------------------[ IC configuration ]---*/
|
void ic_enabled(union param_val val, void *dat)
|
void ic_enabled(union param_val val, void *dat)
|
{
|
{
|
config.ic.enabled = val.int_val;
|
config.ic.enabled = val.int_val;
|
setsprbits (SPR_UPR, SPR_UPR_ICP, val.int_val ? 1 : 0);
|
if(val.int_val)
|
|
cpu_state.sprs[SPR_UPR] |= SPR_UPR_ICP;
|
|
else
|
|
cpu_state.sprs[SPR_UPR] &= ~SPR_UPR_ICP;
|
}
|
}
|
|
|
void ic_nsets(union param_val val, void *dat)
|
void ic_nsets(union param_val val, void *dat)
|
{
|
{
|
if (is_power2(val.int_val) && val.int_val <= MAX_IC_SETS){
|
if (is_power2(val.int_val) && val.int_val <= MAX_IC_SETS){
|
config.ic.nsets = val.int_val;
|
config.ic.nsets = val.int_val;
|
setsprbits (SPR_ICCFGR, SPR_ICCFGR_NCS,log2(val.int_val));
|
cpu_state.sprs[SPR_ICCFGR] &= ~SPR_ICCFGR_NCS;
|
|
cpu_state.sprs[SPR_ICCFGR] |= log2(val.int_val) << 3;
|
}
|
}
|
else {
|
else {
|
char tmp[200];
|
char tmp[200];
|
sprintf (tmp, "value of power of two and lower or equal than %i expected.", MAX_IC_SETS);
|
sprintf (tmp, "value of power of two and lower or equal than %i expected.", MAX_IC_SETS);
|
CONFIG_ERROR(tmp);
|
CONFIG_ERROR(tmp);
|
| Line 213... |
Line 218... |
|
|
void ic_nways(union param_val val, void *dat)
|
void ic_nways(union param_val val, void *dat)
|
{
|
{
|
if (is_power2(val.int_val) && val.int_val <= MAX_IC_WAYS) {
|
if (is_power2(val.int_val) && val.int_val <= MAX_IC_WAYS) {
|
config.ic.nways = val.int_val;
|
config.ic.nways = val.int_val;
|
setsprbits (SPR_ICCFGR, SPR_ICCFGR_NCW, log2(val.int_val));
|
cpu_state.sprs[SPR_ICCFGR] &= ~SPR_ICCFGR_NCW;
|
|
cpu_state.sprs[SPR_ICCFGR] |= log2(val.int_val);
|
}
|
}
|
else {
|
else {
|
char tmp[200];
|
char tmp[200];
|
sprintf (tmp, "value of power of two and lower or equal than %i expected.",
|
sprintf (tmp, "value of power of two and lower or equal than %i expected.",
|
MAX_IC_WAYS);
|
MAX_IC_WAYS);
|
| Line 227... |
Line 233... |
|
|
void ic_blocksize(union param_val val, void *dat)
|
void ic_blocksize(union param_val val, void *dat)
|
{
|
{
|
if (is_power2(val.int_val)){
|
if (is_power2(val.int_val)){
|
config.ic.blocksize = val.int_val;
|
config.ic.blocksize = val.int_val;
|
setsprbits (SPR_ICCFGR, SPR_ICCFGR_CBS,log2(val.int_val));
|
cpu_state.sprs[SPR_ICCFGR] &= ~SPR_ICCFGR_CBS;
|
|
cpu_state.sprs[SPR_ICCFGR] |= log2(val.int_val) << 7;
|
} else
|
} else
|
CONFIG_ERROR("value of power of two expected.");
|
CONFIG_ERROR("value of power of two expected.");
|
}
|
}
|
|
|
void ic_ustates(union param_val val, void *dat)
|
void ic_ustates(union param_val val, void *dat)
|
