URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 1461 |
Rev 1465 |
Line 86... |
Line 86... |
}
|
}
|
|
|
/* Print register values on stdout */
|
/* Print register values on stdout */
|
void dma_status( void *dat )
|
void dma_status( void *dat )
|
{
|
{
|
unsigned i, j;
|
unsigned j;
|
struct dma_controller *dma = dat;
|
struct dma_controller *dma = dat;
|
|
|
if ( dma->baseaddr == 0 )
|
if ( dma->baseaddr == 0 )
|
return;
|
return;
|
|
|
PRINTF( "\nDMA controller %u at 0x%"PRIxADDR":\n", i, dma->baseaddr );
|
PRINTF( "\nDMA controller at 0x%"PRIxADDR":\n", dma->baseaddr );
|
PRINTF( "CSR : 0x%08lX\n", dma->regs.csr );
|
PRINTF( "CSR : 0x%08lX\n", dma->regs.csr );
|
PRINTF( "INT_MSK_A : 0x%08lX\n", dma->regs.int_msk_a );
|
PRINTF( "INT_MSK_A : 0x%08lX\n", dma->regs.int_msk_a );
|
PRINTF( "INT_MSK_B : 0x%08lX\n", dma->regs.int_msk_b );
|
PRINTF( "INT_MSK_B : 0x%08lX\n", dma->regs.int_msk_b );
|
PRINTF( "INT_SRC_A : 0x%08lX\n", dma->regs.int_src_a );
|
PRINTF( "INT_SRC_A : 0x%08lX\n", dma->regs.int_src_a );
|
PRINTF( "INT_SRC_B : 0x%08lX\n", dma->regs.int_src_b );
|
PRINTF( "INT_SRC_B : 0x%08lX\n", dma->regs.int_src_b );
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.