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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [sim-config.h] - Diff between revs 1485 and 1486

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Rev 1485 Rev 1486
Line 22... Line 22...
 
 
#include <stdio.h>
#include <stdio.h>
 
 
/* Simulator configuration macros. Eventually this one will be a lot bigger. */
/* Simulator configuration macros. Eventually this one will be a lot bigger. */
 
 
#define MAX_MEMORIES     16           /* Max. number of memory devices attached */
 
#define MAX_SBUF_LEN     256          /* Max. length of store buffer */
#define MAX_SBUF_LEN     256          /* Max. length of store buffer */
 
 
#define EXE_LOG_HARDWARE 0            /* Print out RTL states */
#define EXE_LOG_HARDWARE 0            /* Print out RTL states */
#define EXE_LOG_SIMPLE   1            /* Executed log prints out dissasembly */
#define EXE_LOG_SIMPLE   1            /* Executed log prints out dissasembly */
#define EXE_LOG_SOFTWARE 2            /* Simple with some register output*/
#define EXE_LOG_SOFTWARE 2            /* Simple with some register output*/
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  struct {
  struct {
    int enabled;                      /* Is tick timer enabled?  */
    int enabled;                      /* Is tick timer enabled?  */
  } tick;
  } tick;
 
 
  struct {
  struct {
    int pattern;                      /* A user specified memory initialization pattern */
 
    int random_seed;                  /* Initialize the memory with random values, starting with seed */
 
    enum {
 
      MT_UNKNOWN,
 
      MT_PATTERN,
 
      MT_RANDOM
 
    } type;
 
    int nmemories;                    /* Number of attached memories */
 
    struct {
 
      int ce;                         /* Which ce this memory is associated with */
 
      unsigned long baseaddr;         /* Start address of the memory */
 
      unsigned long size;             /* Memory size */
 
      char name[STR_SIZE];            /* Memory type string */
 
      char log[STR_SIZE];             /* Memory log filename */
 
      int delayr;                     /* Read cycles */
 
      int delayw;                     /* Write cycles */
 
    } table[MAX_MEMORIES];
 
  } memory;
 
 
 
  struct {
 
    int enabled;                      /* Whether IMMU is enabled */
    int enabled;                      /* Whether IMMU is enabled */
    int nways;                        /* Number of ITLB ways */
    int nways;                        /* Number of ITLB ways */
    int nsets;                        /* Number of ITLB sets */
    int nsets;                        /* Number of ITLB sets */
    int pagesize;                     /* ITLB page size */
    int pagesize;                     /* ITLB page size */
    int entrysize;                    /* ITLB entry size */
    int entrysize;                    /* ITLB entry size */
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    int stalled;
    int stalled;
    int hazardwait;                   /* how many cycles were wasted because of hazards */
    int hazardwait;                   /* how many cycles were wasted because of hazards */
    int supercycles;                  /* Superscalar cycles */
    int supercycles;                  /* Superscalar cycles */
  } cpu;
  } cpu;
 
 
  struct {
 
    int random_seed;                  /* Initialize the memory with random values, starting with seed */
 
  } memory;
 
 
 
  struct {                            /* Verification API, part of Advanced Core Verification */
  struct {                            /* Verification API, part of Advanced Core Verification */
    int enabled;                      /* Whether is VAPI module enabled */
    int enabled;                      /* Whether is VAPI module enabled */
    FILE *vapi_file;                  /* vapi file */
    FILE *vapi_file;                  /* vapi file */
    int server_port;                  /* A user specified port number for services */
    int server_port;                  /* A user specified port number for services */
  } vapi;
  } vapi;

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