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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [sim.cfg] - Diff between revs 425 and 427

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Rev 425 Rev 427
Line 120... Line 120...
    delayr = 2
    delayr = 2
    delayw = 4
    delayw = 4
  enddevice
  enddevice
end
end
 
 
 
/* IMMU SECTION
 
 
 
    This section configures Instruction Memory Menangement Unit
 
 
 
    enabled = 0/1
 
       whether IMMU is enabled
 
 
 
    nsets = 
 
       number of ITLB sets; must be power of two
 
 
 
    nways = 
 
       number of ITLB ways
 
 
 
    pagesize = 
 
       instruction page size; must be power of two
 
 
 
    entrysize = 
 
       instruction entry size in bytes
 
 
 
    ustates = 
 
       number of ITLB usage states (2, 3, 4 etc., max is 4)
 
*/
 
 
 
section immu
 
  enabled = 0
 
  nsets = 32
 
  nways = 1
 
  pagesize = 4096
 
end
 
 
 
/* DMMU SECTION
 
 
 
    This section configures Data Memory Menangement Unit
 
 
 
    enabled = 0/1
 
       whether DMMU is enabled
 
 
 
    nsets = 
 
       number of DTLB sets; must be power of two
 
 
 
    nways = 
 
       number of DTLB ways
 
 
 
    pagesize = 
 
       data page size; must be power of two
 
 
 
    entrysize = 
 
       data entry size in bytes
 
 
 
    ustates = 
 
       number of DTLB usage states (2, 3, 4 etc., max is 4)
 
*/
 
 
 
section dmmu
 
  enabled = 0
 
  nsets = 32
 
  nways = 1
 
  pagesize = 4096
 
end
 
 
/* SIM SECTION
/* SIM SECTION
 
 
  This section specifies how should sim behave.
  This section specifies how should sim behave.
 
 
Line 191... Line 250...
 
 
section VAPI
section VAPI
  enabled = 0
  enabled = 0
  server_port = 9998
  server_port = 9998
  log_enabled = 0
  log_enabled = 0
  vapi_fn = "vapi.log"
  vapi_log_fn = "vapi.log"
end
end
 
 
 
 
/* CPU SECTION
/* CPU SECTION
 
 
Line 430... Line 489...
 
 
section tick
section tick
  enabled = 0
  enabled = 0
  irq = 3
  irq = 3
end
end
 
 
/* MMU SECTION
 
 
 
    This section configures Memory Menangement Unit
 
 
 
    enabled = 0/1
 
       whether MMU is enabled
 
 
 
    nisets = 
 
       number of ITLB sets; must be power of two
 
 
 
    niways = 
 
       number of ITLB ways
 
 
 
    ipagesize = 
 
       instruction page size; must be power of two
 
 
 
    ientrysize = 
 
       instruction entry size in bytes
 
 
 
    iustates = 
 
       number of ITLB usage states (2, 3, 4 etc., max is 4)
 
 
 
    ndsets = 
 
       number of DTLB sets; must be power of two
 
 
 
    ndways = 
 
       number of DTLB ways
 
 
 
    dpagesize = 
 
       data page size; must be power of two
 
 
 
    dentrysize = 
 
       data entry size in bytes
 
 
 
    dustates = 
 
       number of DTLB usage states (2, 3, 4 etc., max is 4)
 
*/
 
 
 
section mmu
 
  enabled = 0
 
  nisets = 32
 
  niways = 1
 
  ipagesize = 4096
 
  ndsets = 32
 
  ndways = 1
 
  dpagesize = 4096
 
endsection
 

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