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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [testbench/] [mmu.c] - Diff between revs 466 and 480

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Rev 466 Rev 480
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/* This is MMU test for OpenRISC 1200 */
/* This is MMU test for OpenRISC 1200 */
 
 
#include "spr_defs.h"
#include "spr_defs.h"
#include "support.h"
#include "support.h"
 
 
 
/* For shorter simulation run */
 
#define RTL_SIM 1
 
 
/* Define RAM physical location and size
/* Define RAM physical location and size
   Bottom half will be used for this program, the rest
   Bottom half will be used for this program, the rest
   will be used for testing */
   will be used for testing */
#define FLASH_START 0x00000000
#define FLASH_START 0x00000000
#define FLASH_SIZE  0x00200000
#define FLASH_SIZE  0x00200000
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#if 1
#if 1
  /* Translation test */
  /* Translation test */
  dtlb_translation_test ();
  dtlb_translation_test ();
 
 
  /* Virtual address match test */
  /* Virtual address match test */
 
#ifndef RTL_SIM
  for (j = 0; j < DTLB_WAYS; j++) {
  for (j = 0; j < DTLB_WAYS; j++) {
    for (i = TLB_DATA_SET_NB; i < (DTLB_SETS - 1); i++)
    for (i = TLB_DATA_SET_NB; i < (DTLB_SETS - 1); i++)
      dtlb_match_test (j, i);
      dtlb_match_test (j, i);
  }
  }
 
#else
 
  dtlb_match_test (0, DTLB_SETS - 2);
 
#endif
 
 
  /* Valid bit testing */
  /* Valid bit testing */
 
#ifndef RTL_SIM
  for (i = TLB_DATA_SET_NB; i < (DTLB_SETS - 1); i++)
  for (i = TLB_DATA_SET_NB; i < (DTLB_SETS - 1); i++)
    dtlb_valid_bit_test (i);
    dtlb_valid_bit_test (i);
 
#else
 
  dtlb_valid_bit_test (DTLB_SETS - 2);
 
#endif
 
 
  /* Permission test */
  /* Permission test */
 
#ifndef RTL_SIM
  for (i = TLB_DATA_SET_NB; i < (DTLB_SETS - 1); i++)
  for (i = TLB_DATA_SET_NB; i < (DTLB_SETS - 1); i++)
    dtlb_premission_test (i);
    dtlb_premission_test (i);
 
#else
 
  dtlb_premission_test (DTLB_SETS - 2);
 
#endif
 
 
#endif
#endif
 
 
#if 1
#if 1
  /* Translation test */
  /* Translation test */
  itlb_translation_test ();
  itlb_translation_test ();
 
 
  /* Virtual address match test */
  /* Virtual address match test */
 
#ifndef RTL_SIM
  for (j = 0; j < DTLB_WAYS; j++) {
  for (j = 0; j < DTLB_WAYS; j++) {
    for (i = TLB_TEXT_SET_NB + 1; i < (DTLB_SETS - 1); i++)
    for (i = TLB_TEXT_SET_NB + 1; i < (DTLB_SETS - 1); i++)
      itlb_match_test (j, i);
      itlb_match_test (j, i);
  }
  }
 
#else
 
  itlb_match_test (0, DTLB_SETS - 2);
 
#endif
 
 
  /* Valid bit testing */
  /* Valid bit testing */
 
#ifndef RTL_SIM
  for (i = TLB_TEXT_SET_NB; i < (ITLB_SETS); i++)
  for (i = TLB_TEXT_SET_NB; i < (ITLB_SETS); i++)
    itlb_valid_bit_test (i);
    itlb_valid_bit_test (i);
 
#else
 
  itlb_valid_bit_test (ITLB_SETS-1);
 
#endif
 
 
  /* Permission test */
  /* Permission test */
 
#ifndef RTL_SIM
  for (i = TLB_TEXT_SET_NB; i < (ITLB_SETS - 1); i++)
  for (i = TLB_TEXT_SET_NB; i < (ITLB_SETS - 1); i++)
    itlb_premission_test (i);
    itlb_premission_test (i);
 
#else
 
  itlb_premission_test (ITLB_SETS - 2);
 
#endif
 
 
#endif
#endif
 
 
  report (0xdeaddead);
  report (0xdeaddead);
  exit (0);
  exit (0);

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