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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [toplevel.c] - Diff between revs 1480 and 1486

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Rev 1480 Rev 1486
Line 66... Line 66...
#include "dumpverilog.h"
#include "dumpverilog.h"
#include "trace.h"
#include "trace.h"
#include "cuc.h"
#include "cuc.h"
 
 
/* CVS revision number. */
/* CVS revision number. */
const char rcsrev[] = "$Revision: 1.126 $";
const char rcsrev[] = "$Revision: 1.127 $";
 
 
inline void debug(int level, const char *format, ...)
inline void debug(int level, const char *format, ...)
{
{
  char *p;
  char *p;
  va_list ap;
  va_list ap;
Line 183... Line 183...
  pm_reset();
  pm_reset();
  pic_reset();
  pic_reset();
  du_reset ();
  du_reset ();
 
 
  /* Make sure that runtime.sim.iprompt is the first thing to get checked */
  /* Make sure that runtime.sim.iprompt is the first thing to get checked */
  SCHED_ADD(check_int, NULL, 0);
  SCHED_ADD(check_int, NULL, 1);
 
 
  lock_memory_table ();
 
 
 
  /* FIXME: Lame-ass way to get runtime.sim.mem_cycles not going into overly
  /* FIXME: Lame-ass way to get runtime.sim.mem_cycles not going into overly
   * negative numbers.  This happens because parse.c uses setsim_mem32 to load
   * negative numbers.  This happens because parse.c uses setsim_mem32 to load
   * the program but set_mem32 calls dc_simulate_write, which inturn calls
   * the program but set_mem32 calls dc_simulate_write, which inturn calls
   * setsim_mem32.  This mess of memory statistics needs to be sorted out for
   * setsim_mem32.  This mess of memory statistics needs to be sorted out for
Line 197... Line 195...
  runtime.sim.mem_cycles = 0;
  runtime.sim.mem_cycles = 0;
  cpu_reset();
  cpu_reset();
}
}
 
 
/* Initalizes all devices and sim */
/* Initalizes all devices and sim */
void sim_init ()
void sim_init (void)
{
{
  init_memory_table ();
 
  init_labels();
  init_labels();
  init_breakpoints();
  init_breakpoints();
  initstats();
  initstats();
  build_automata();
  build_automata();
 
 
Line 246... Line 243...
      PRINTF("ERROR: Problems opening spr_log file.\n");
      PRINTF("ERROR: Problems opening spr_log file.\n");
      exit(1);
      exit(1);
    }
    }
  }
  }
 
 
  /* Initialize memory */
 
  {
 
    extern struct dev_memarea *dev_list;
 
    struct dev_memarea *area;
 
    int i;
 
    if (config.memory.type == MT_RANDOM) {
 
      unsigned int val = 0;
 
 
 
      if (config.memory.random_seed == -1) {
 
        runtime.memory.random_seed = time(NULL);
 
        /* Print out the seed just in case we ever need to debug */
 
        PRINTF("Seeding random generator with value %d\n", config.memory.random_seed);
 
      } else
 
        runtime.memory.random_seed = config.memory.random_seed;
 
      srandom(runtime.memory.random_seed);
 
 
 
      for (area = dev_list; area; area = area->next)
 
        for(i = 0; i < area->size; i++) {
 
          val = random();
 
          setsim_mem8(i + area->addr_compare, val & 0xFF);
 
        }
 
    } else if(config.memory.type == MT_PATTERN) {
 
      for (area = dev_list; area; area = area->next)
 
        for(i = 0; i < area->size; i++)
 
          setsim_mem8(i + area->addr_compare, config.memory.pattern);
 
    } else if (config.memory.type != MT_UNKNOWN) {
 
      fprintf(stderr, "Invalid memory configuration type.\n");
 
      exit(1);
 
    }
 
  }
 
 
 
  if(runtime.sim.filename) {
  if(runtime.sim.filename) {
    unsigned long endaddr = 0xFFFFFFFF;
    unsigned long endaddr = 0xFFFFFFFF;
    endaddr = loadcode(runtime.sim.filename, 0, 0); /* MM170901 always load at address zero.  */
    endaddr = loadcode(runtime.sim.filename, 0, 0); /* MM170901 always load at address zero.  */
    if (endaddr == -1) {
    if (endaddr == -1) {
      fprintf(stderr, "Problems loading boot code.\n");
      fprintf(stderr, "Problems loading boot code.\n");

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