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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [cache/] [icache_model.c] - Diff between revs 110 and 167

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Rev 110	Rev 167
Line 31...	Line 31...
`#include "icache_model.h"`	`#include "icache_model.h"`
`#include "abstract.h"`	`#include "abstract.h"`
`#include "stats.h"`	`#include "stats.h"`
`#include "sim-config.h"`	`#include "sim-config.h"`
`#include "spr_defs.h"`	`#include "spr_defs.h"`
	`#include "sprs.h"`

`/* Instruction cache */`	`/* Instruction cache */`

`/* Number of IC sets (power of 2) */`	`/* Number of IC sets (power of 2) */`
`#define IC_SETS 512`	`#define IC_SETS 512`
Line 55...	Line 56...
`} way[IC_WAYS];`	`} way[IC_WAYS];`
`} ic[IC_SETS];`	`} ic[IC_SETS];`

`void ic_info()`	`void ic_info()`
`{`	`{`
`if (!getsprbits(SPR_UPR, SPR_UPR_ICP)) {`	`if (!testsprbits(SPR_UPR, SPR_UPR_ICP)) {`
`printf("ICache not implemented. Set UPR[ICP].\n");`	`printf("ICache not implemented. Set UPR[ICP].\n");`
`return;`	`return;`
`}`	`}`

`printf("Instruction cache %dKB: ", IC_SETS * IC_BLOCK_SIZE * IC_WAYS / 1024);`	`printf("Instruction cache %dKB: ", IC_SETS * IC_BLOCK_SIZE * IC_WAYS / 1024);`
Line 82...	Line 83...
`int set, way = -1;`	`int set, way = -1;`
`int i;`	`int i;`
`unsigned long tagaddr;`	`unsigned long tagaddr;`

`/* ICache simulation enabled/disabled. */`	`/* ICache simulation enabled/disabled. */`
`if ((!getsprbits(SPR_UPR, SPR_UPR_ICP)) \|\| (!getsprbits(SPR_SR, SPR_SR_ICE)))`	`if ((!testsprbits(SPR_UPR, SPR_UPR_ICP)) \|\| (!testsprbits(SPR_SR, SPR_SR_ICE)))`
`return;`	`return;`

`/* Which set to check out? */`	`/* Which set to check out? */`
`set = (fetchaddr / IC_BLOCK_SIZE) % IC_SETS;`	`set = (fetchaddr / IC_BLOCK_SIZE) % IC_SETS;`
`tagaddr = (fetchaddr / IC_BLOCK_SIZE) / IC_SETS;`	`tagaddr = (fetchaddr / IC_BLOCK_SIZE) / IC_SETS;`
Line 133...	Line 134...
`{`	`{`
`int set, way = -1;`	`int set, way = -1;`
`int i;`	`int i;`
`unsigned long tagaddr;`	`unsigned long tagaddr;`

`if (!getsprbits(SPR_UPR, SPR_UPR_ICP))`	`if (!testsprbits(SPR_UPR, SPR_UPR_ICP))`
`return;`	`return;`

`/* Which set to check out? */`	`/* Which set to check out? */`
`set = (dataaddr / IC_BLOCK_SIZE) % IC_SETS;`	`set = (dataaddr / IC_BLOCK_SIZE) % IC_SETS;`
`tagaddr = (dataaddr / IC_BLOCK_SIZE) / IC_SETS;`	`tagaddr = (dataaddr / IC_BLOCK_SIZE) / IC_SETS;`

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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [cache/] [icache_model.c] - Diff between revs 110 and 167