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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [cpu/] [or1k/] [sprs.c] - Diff between revs 1452 and 1471

Rev 1452	Rev 1471
Line 151...	Line 151...
`audio_cnt++;`	`audio_cnt++;`
`break;`	`break;`
`case 0xFFFF:`	`case 0xFFFF:`
`fclose(fo);`	`fclose(fo);`
`PRINTF("Audio closed.\n");`	`PRINTF("Audio closed.\n");`
`runtime.sim.cont_run = 0;`	`sim_done();`
`break;`	`break;`
`case SPR_PMR:`	`case SPR_PMR:`
`/* PMR[SDF] and PMR[DCGE] are ignored completely. */`	`/* PMR[SDF] and PMR[DCGE] are ignored completely. */`
`if (value & SPR_PMR_SUME) {`	`if (value & SPR_PMR_SUME) {`
`PRINTF ("SUSPEND: PMR[SUME] bit was set.\n");`	`PRINTF ("SUSPEND: PMR[SUME] bit was set.\n");`
`runtime.sim.cont_run = 0;`	`sim_done();`
`}`	`}`
`break;`	`break;`
`default:`	`default:`
`/* Mask reseved bits in DTLBMR and DTLBMR registers */`	`/* Mask reseved bits in DTLBMR and DTLBMR registers */`
`if ( (regno >= SPR_DTLBMR_BASE(0)) && (regno < SPR_DTLBTR_LAST(3))) {`	`if ( (regno >= SPR_DTLBMR_BASE(0)) && (regno < SPR_DTLBTR_LAST(3))) {`