| Line 122... |
Line 122... |
{
|
{
|
struct dma_controller *dma = dat;
|
struct dma_controller *dma = dat;
|
|
|
addr -= dma->baseaddr;
|
addr -= dma->baseaddr;
|
|
|
if ( addr % 4 != 0 ) {
|
|
fprintf( stderr, "dma_read32( 0x%"PRIxADDR" ): Not register-aligned\n",
|
|
addr + dma->baseaddr );
|
|
runtime.sim.cont_run = 0;
|
|
return 0;
|
|
}
|
|
|
|
if ( addr < DMA_CH_BASE ) {
|
if ( addr < DMA_CH_BASE ) {
|
/* case of global (not per-channel) registers */
|
/* case of global (not per-channel) registers */
|
switch( addr ) {
|
switch( addr ) {
|
case DMA_CSR: return dma->regs.csr;
|
case DMA_CSR: return dma->regs.csr;
|
case DMA_INT_MSK_A: return dma->regs.int_msk_a;
|
case DMA_INT_MSK_A: return dma->regs.int_msk_a;
|
| Line 140... |
Line 133... |
case DMA_INT_SRC_A: return dma->regs.int_src_a;
|
case DMA_INT_SRC_A: return dma->regs.int_src_a;
|
case DMA_INT_SRC_B: return dma->regs.int_src_b;
|
case DMA_INT_SRC_B: return dma->regs.int_src_b;
|
default:
|
default:
|
fprintf( stderr, "dma_read32( 0x%"PRIxADDR" ): Illegal register\n",
|
fprintf( stderr, "dma_read32( 0x%"PRIxADDR" ): Illegal register\n",
|
addr + dma->baseaddr );
|
addr + dma->baseaddr );
|
runtime.sim.cont_run = 0;
|
|
return 0;
|
return 0;
|
}
|
}
|
} else {
|
} else {
|
/* case of per-channel registers */
|
/* case of per-channel registers */
|
unsigned chno = (addr - DMA_CH_BASE) / DMA_CH_SIZE;
|
unsigned chno = (addr - DMA_CH_BASE) / DMA_CH_SIZE;
|
| Line 185... |
Line 177... |
{
|
{
|
struct dma_controller *dma = dat;
|
struct dma_controller *dma = dat;
|
|
|
addr -= dma->baseaddr;
|
addr -= dma->baseaddr;
|
|
|
if ( addr % 4 != 0 ) {
|
|
fprintf( stderr, "dma_write32( 0x%"PRIxADDR", 0x%08"PRIx32" ): Not register-aligned\n", addr + dma->baseaddr, value );
|
|
runtime.sim.cont_run = 0;
|
|
return;
|
|
}
|
|
|
|
/* case of global (not per-channel) registers */
|
/* case of global (not per-channel) registers */
|
if ( addr < DMA_CH_BASE ) {
|
if ( addr < DMA_CH_BASE ) {
|
switch( addr ) {
|
switch( addr ) {
|
case DMA_CSR:
|
case DMA_CSR:
|
if ( TEST_FLAG( value, DMA_CSR, PAUSE ) )
|
if ( TEST_FLAG( value, DMA_CSR, PAUSE ) )
|
| Line 206... |
Line 192... |
case DMA_INT_SRC_A: dma->regs.int_src_a = value; break;
|
case DMA_INT_SRC_A: dma->regs.int_src_a = value; break;
|
case DMA_INT_SRC_B: dma->regs.int_src_b = value; break;
|
case DMA_INT_SRC_B: dma->regs.int_src_b = value; break;
|
default:
|
default:
|
fprintf( stderr, "dma_write32( 0x%"PRIxADDR" ): Illegal register\n",
|
fprintf( stderr, "dma_write32( 0x%"PRIxADDR" ): Illegal register\n",
|
addr + dma->baseaddr );
|
addr + dma->baseaddr );
|
runtime.sim.cont_run = 0;
|
|
return;
|
return;
|
}
|
}
|
} else {
|
} else {
|
/* case of per-channel registers */
|
/* case of per-channel registers */
|
unsigned chno = (addr - DMA_CH_BASE) / DMA_CH_SIZE;
|
unsigned chno = (addr - DMA_CH_BASE) / DMA_CH_SIZE;
|
