| Line 119... |
Line 119... |
}
|
}
|
|
|
/* verify we found a controller */
|
/* verify we found a controller */
|
if ( dma == NULL ) {
|
if ( dma == NULL ) {
|
fprintf( stderr, "dma_read32( 0x%08lX ): Out of range\n", addr );
|
fprintf( stderr, "dma_read32( 0x%08lX ): Out of range\n", addr );
|
cont_run = 0;
|
runtime.sim.cont_run = 0;
|
return 0;
|
return 0;
|
}
|
}
|
|
|
addr -= dma->baseaddr;
|
addr -= dma->baseaddr;
|
|
|
if ( addr % 4 != 0 ) {
|
if ( addr % 4 != 0 ) {
|
fprintf( stderr, "dma_read32( 0x%08lX ): Not register-aligned\n", addr + dma->baseaddr );
|
fprintf( stderr, "dma_read32( 0x%08lX ): Not register-aligned\n", addr + dma->baseaddr );
|
cont_run = 0;
|
runtime.sim.cont_run = 0;
|
return 0;
|
return 0;
|
}
|
}
|
|
|
if ( addr < DMA_CH_BASE ) {
|
if ( addr < DMA_CH_BASE ) {
|
/* case of global (not per-channel) registers */
|
/* case of global (not per-channel) registers */
|
| Line 141... |
Line 141... |
case DMA_INT_MSK_B: return dma->regs.int_msk_b;
|
case DMA_INT_MSK_B: return dma->regs.int_msk_b;
|
case DMA_INT_SRC_A: return dma->regs.int_src_a;
|
case DMA_INT_SRC_A: return dma->regs.int_src_a;
|
case DMA_INT_SRC_B: return dma->regs.int_src_b;
|
case DMA_INT_SRC_B: return dma->regs.int_src_b;
|
default:
|
default:
|
fprintf( stderr, "dma_read32( 0x%08lX ): Illegal register\n", addr + dma->baseaddr );
|
fprintf( stderr, "dma_read32( 0x%08lX ): Illegal register\n", addr + dma->baseaddr );
|
cont_run = 0;
|
runtime.sim.cont_run = 0;
|
return 0;
|
return 0;
|
}
|
}
|
} else {
|
} else {
|
/* case of per-channel registers */
|
/* case of per-channel registers */
|
unsigned chno = (addr - DMA_CH_BASE) / DMA_CH_SIZE;
|
unsigned chno = (addr - DMA_CH_BASE) / DMA_CH_SIZE;
|
| Line 193... |
Line 193... |
}
|
}
|
|
|
/* verify we found a controller */
|
/* verify we found a controller */
|
if ( dma == NULL ) {
|
if ( dma == NULL ) {
|
fprintf( stderr, "dma_write32( 0x%08lX ): Out of range\n", addr );
|
fprintf( stderr, "dma_write32( 0x%08lX ): Out of range\n", addr );
|
cont_run = 0;
|
runtime.sim.cont_run = 0;
|
return;
|
return;
|
}
|
}
|
|
|
addr -= dma->baseaddr;
|
addr -= dma->baseaddr;
|
|
|
if ( addr % 4 != 0 ) {
|
if ( addr % 4 != 0 ) {
|
fprintf( stderr, "dma_write32( 0x%08lX, 0x%08lX ): Not register-aligned\n", addr + dma->baseaddr, value );
|
fprintf( stderr, "dma_write32( 0x%08lX, 0x%08lX ): Not register-aligned\n", addr + dma->baseaddr, value );
|
cont_run = 0;
|
runtime.sim.cont_run = 0;
|
return;
|
return;
|
}
|
}
|
|
|
/* case of global (not per-channel) registers */
|
/* case of global (not per-channel) registers */
|
if ( addr < DMA_CH_BASE ) {
|
if ( addr < DMA_CH_BASE ) {
|
| Line 219... |
Line 219... |
case DMA_INT_MSK_B: dma->regs.int_msk_b = value; break;
|
case DMA_INT_MSK_B: dma->regs.int_msk_b = value; break;
|
case DMA_INT_SRC_A: dma->regs.int_src_a = value; break;
|
case DMA_INT_SRC_A: dma->regs.int_src_a = value; break;
|
case DMA_INT_SRC_B: dma->regs.int_src_b = value; break;
|
case DMA_INT_SRC_B: dma->regs.int_src_b = value; break;
|
default:
|
default:
|
fprintf( stderr, "dma_write32( 0x%08lX ): Illegal register\n", addr + dma->baseaddr );
|
fprintf( stderr, "dma_write32( 0x%08lX ): Illegal register\n", addr + dma->baseaddr );
|
cont_run = 0;
|
runtime.sim.cont_run = 0;
|
return;
|
return;
|
}
|
}
|
} else {
|
} else {
|
/* case of per-channel registers */
|
/* case of per-channel registers */
|
unsigned chno = (addr - DMA_CH_BASE) / DMA_CH_SIZE;
|
unsigned chno = (addr - DMA_CH_BASE) / DMA_CH_SIZE;
|
