| Line 41... |
Line 41... |
#include "mc.h"
|
#include "mc.h"
|
#include "abstract.h"
|
#include "abstract.h"
|
#include "sim-config.h"
|
#include "sim-config.h"
|
#include "debug.h"
|
#include "debug.h"
|
|
|
|
DEFAULT_DEBUG_CHANNEL(mc);
|
|
|
struct mc_area {
|
struct mc_area {
|
struct dev_memarea *mem;
|
struct dev_memarea *mem;
|
unsigned int cs;
|
unsigned int cs;
|
int mc;
|
int mc;
|
struct mc_area *next;
|
struct mc_area *next;
|
| Line 106... |
Line 108... |
void mc_write_word(oraddr_t addr, uint32_t value, void *dat)
|
void mc_write_word(oraddr_t addr, uint32_t value, void *dat)
|
{
|
{
|
struct mc *mc = dat;
|
struct mc *mc = dat;
|
int chipsel;
|
int chipsel;
|
|
|
debug(5, "mc_write_word(%"PRIxADDR",%08"PRIx32")\n", addr, value);
|
TRACE("mc_write_word(%"PRIxADDR",%08"PRIx32")\n", addr, value);
|
|
|
switch (addr) {
|
switch (addr) {
|
case MC_CSR:
|
case MC_CSR:
|
mc->csr = value;
|
mc->csr = value;
|
break;
|
break;
|
case MC_POC:
|
case MC_POC:
|
fprintf (stderr, "warning: write to MC's POC register!");
|
WARN("warning: write to MC's POC register!");
|
break;
|
break;
|
case MC_BA_MASK:
|
case MC_BA_MASK:
|
mc->ba_mask = value & MC_BA_MASK_VALID;
|
mc->ba_mask = value & MC_BA_MASK_VALID;
|
for (chipsel = 0; chipsel < N_CE; chipsel++)
|
for (chipsel = 0; chipsel < N_CE; chipsel++)
|
set_csc_tms (chipsel, mc->csc[chipsel], mc->tms[chipsel], mc);
|
set_csc_tms (chipsel, mc->csc[chipsel], mc->tms[chipsel], mc);
|
| Line 131... |
Line 133... |
mc->csc[addr >> 3] = value;
|
mc->csc[addr >> 3] = value;
|
|
|
set_csc_tms (addr >> 3, mc->csc[addr >> 3], mc->tms[addr >> 3], mc);
|
set_csc_tms (addr >> 3, mc->csc[addr >> 3], mc->tms[addr >> 3], mc);
|
break;
|
break;
|
} else
|
} else
|
debug(1, "write out of range (addr %"PRIxADDR")\n", addr + mc->baseaddr);
|
TRACE("write out of range (addr %"PRIxADDR")\n", addr + mc->baseaddr);
|
}
|
}
|
}
|
}
|
|
|
/* Read a specific MC register. */
|
/* Read a specific MC register. */
|
uint32_t mc_read_word(oraddr_t addr, void *dat)
|
uint32_t mc_read_word(oraddr_t addr, void *dat)
|
{
|
{
|
struct mc *mc = dat;
|
struct mc *mc = dat;
|
uint32_t value = 0;
|
uint32_t value = 0;
|
|
|
debug(5, "mc_read_word(%"PRIxADDR")", addr);
|
TRACE("mc_read_word(%"PRIxADDR")", addr);
|
|
|
switch (addr) {
|
switch (addr) {
|
case MC_CSR:
|
case MC_CSR:
|
value = mc->csr;
|
value = mc->csr;
|
break;
|
break;
|
| Line 161... |
Line 163... |
if ((addr >> 2) & 1)
|
if ((addr >> 2) & 1)
|
value = mc->tms[addr >> 3];
|
value = mc->tms[addr >> 3];
|
else
|
else
|
value = mc->csc[addr >> 3];
|
value = mc->csc[addr >> 3];
|
} else
|
} else
|
debug(1, " read out of range (addr %"PRIxADDR")\n", addr + mc->baseaddr);
|
TRACE(" read out of range (addr %"PRIxADDR")\n", addr + mc->baseaddr);
|
break;
|
break;
|
}
|
}
|
debug(5, " value(%"PRIx32")\n", value);
|
TRACE(" value(%"PRIx32")\n", value);
|
return value;
|
return value;
|
}
|
}
|
|
|
/* Read POC register and init memory controler regs. */
|
/* Read POC register and init memory controler regs. */
|
void mc_reset(void *dat)
|
void mc_reset(void *dat)
|
