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Line 66... |
#include "dumpverilog.h"
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#include "dumpverilog.h"
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#include "trace.h"
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#include "trace.h"
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#include "cuc.h"
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#include "cuc.h"
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/* CVS revision number. */
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/* CVS revision number. */
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const char rcsrev[] = "$Revision: 1.127 $";
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const char rcsrev[] = "$Revision: 1.128 $";
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inline void debug(int level, const char *format, ...)
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inline void debug(int level, const char *format, ...)
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{
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{
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char *p;
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char *p;
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va_list ap;
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va_list ap;
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Line 422... |
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/* Each cycle has counter of mem_cycles; this value is joined with cycles
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/* Each cycle has counter of mem_cycles; this value is joined with cycles
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at the end of the cycle; no sim originated memory accesses should be
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at the end of the cycle; no sim originated memory accesses should be
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performed inbetween. */
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performed inbetween. */
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runtime.sim.mem_cycles = 0;
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runtime.sim.mem_cycles = 0;
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if (!config.pm.enabled || !testsprbits(SPR_PMR, SPR_PMR_DME | SPR_PMR_SME))
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if (!config.pm.enabled ||
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!(cpu_state.sprs[SPR_PMR] & (SPR_PMR_DME | SPR_PMR_SME)))
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if (cpu_clock ())
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if (cpu_clock ())
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/* A breakpoint has been hit, drop to interactive mode */
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/* A breakpoint has been hit, drop to interactive mode */
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handle_sim_command();
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handle_sim_command();
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if (config.vapi.enabled && runtime.vapi.enabled) vapi_check();
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if (config.vapi.enabled && runtime.vapi.enabled) vapi_check();
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if (config.debug.gdb_enabled) HandleServerSocket(false); /* block & check_stdin = false */
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if (config.debug.gdb_enabled) HandleServerSocket(false); /* block & check_stdin = false */
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if(config.debug.enabled)
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if(config.debug.enabled)
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if (testsprbits(SPR_DMR1, SPR_DMR1_ST)) set_stall_state (1);
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if (cpu_state.sprs[SPR_DMR1] & SPR_DMR1_ST) set_stall_state (1);
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runtime.sim.cycles += runtime.sim.mem_cycles;
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runtime.sim.cycles += runtime.sim.mem_cycles;
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scheduler.job_queue->time -= runtime.sim.cycles - time_start;
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scheduler.job_queue->time -= runtime.sim.cycles - time_start;
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if (scheduler.job_queue->time <= 0) do_scheduler ();
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if (scheduler.job_queue->time <= 0) do_scheduler ();
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}
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}
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