| Line 219... |
Line 219... |
return breakpoint;
|
return breakpoint;
|
}
|
}
|
|
|
static DebugScanChainIDs current_scan_chain = JTAG_CHAIN_GLOBAL;
|
static DebugScanChainIDs current_scan_chain = JTAG_CHAIN_GLOBAL;
|
|
|
int DebugGetRegister(unsigned int address, unsigned long* data)
|
int DebugGetRegister(oraddr_t address, uorreg_t* data)
|
{
|
{
|
int err=0;
|
int err=0;
|
TRACE_(jtag)("Debug get register %x\n",address);
|
TRACE_(jtag)("Debug get register %x\n",address);
|
switch(current_scan_chain)
|
switch(current_scan_chain)
|
{
|
{
|
case JTAG_CHAIN_DEBUG_UNIT:
|
case JTAG_CHAIN_DEBUG_UNIT:
|
*data = mfspr(address);
|
*data = mfspr(address);
|
TRACE_(jtag)("READ (%08lx) = %08lx\n", address, *data);
|
TRACE_(jtag)("READ (%"PRIxADDR") = %"PRIxREG"\n", address, *data);
|
break;
|
break;
|
case JTAG_CHAIN_TRACE:
|
case JTAG_CHAIN_TRACE:
|
*data = 0; /* Scan chain not yet implemented */
|
*data = 0; /* Scan chain not yet implemented */
|
break;
|
break;
|
case JTAG_CHAIN_DEVELOPMENT:
|
case JTAG_CHAIN_DEVELOPMENT:
|
err = get_devint_reg(address,data);
|
err = get_devint_reg(address,data);
|
break;
|
break;
|
case JTAG_CHAIN_WISHBONE:
|
case JTAG_CHAIN_WISHBONE:
|
err = debug_get_mem(address,data);
|
err = debug_get_mem(address,data);
|
break;
|
break;
|
|
default:
|
|
err = JTAG_PROXY_INVALID_CHAIN;
|
}
|
}
|
TRACE_(jtag)("!get reg %lx\n", *data);
|
TRACE_(jtag)("!get reg %"PRIxREG"\n", *data);
|
return err;
|
return err;
|
}
|
}
|
|
|
int DebugSetRegister(unsigned int address,unsigned long data)
|
int DebugSetRegister(oraddr_t address, uorreg_t data)
|
{
|
{
|
int err=0;
|
int err=0;
|
TRACE_(jtag)("Debug set register %x <- %lx\n", address, data);
|
TRACE_(jtag)("Debug set register %"PRIxADDR" <- %"PRIxREG"\n", address, data);
|
switch(current_scan_chain)
|
switch(current_scan_chain)
|
{
|
{
|
case JTAG_CHAIN_DEBUG_UNIT:
|
case JTAG_CHAIN_DEBUG_UNIT:
|
TRACE_(jtag)("WRITE (%08x) = %08lx\n", address, data);
|
TRACE_(jtag)("WRITE (%"PRIxADDR") = %"PRIxREG"\n", address, data);
|
mtspr(address, data);
|
mtspr(address, data);
|
break;
|
break;
|
case JTAG_CHAIN_TRACE:
|
case JTAG_CHAIN_TRACE:
|
err = JTAG_PROXY_ACCESS_EXCEPTION;
|
err = JTAG_PROXY_ACCESS_EXCEPTION;
|
break;
|
break;
|
| Line 262... |
Line 264... |
err = set_devint_reg (address, data);
|
err = set_devint_reg (address, data);
|
break;
|
break;
|
case JTAG_CHAIN_WISHBONE:
|
case JTAG_CHAIN_WISHBONE:
|
err = debug_set_mem (address, data);
|
err = debug_set_mem (address, data);
|
break;
|
break;
|
|
default:
|
|
err = JTAG_PROXY_INVALID_CHAIN;
|
}
|
}
|
TRACE_(jtag)("!set reg\n");
|
TRACE_(jtag)("!set reg\n");
|
return err;
|
return err;
|
}
|
}
|
|
|
| Line 288... |
Line 292... |
}
|
}
|
|
|
void sim_reset ();
|
void sim_reset ();
|
|
|
/* Sets development interface register */
|
/* Sets development interface register */
|
int set_devint_reg(unsigned int address, unsigned long data)
|
int set_devint_reg(unsigned int address, uint32_t data)
|
{
|
{
|
int err = 0;
|
int err = 0;
|
unsigned long value = data;
|
unsigned long value = data;
|
int old_value;
|
int old_value;
|
|
|
| Line 324... |
Line 328... |
case DEVELOPINT_RECBP0: development.recbp = value; break;
|
case DEVELOPINT_RECBP0: development.recbp = value; break;
|
default:
|
default:
|
err = JTAG_PROXY_INVALID_ADDRESS;
|
err = JTAG_PROXY_INVALID_ADDRESS;
|
break;
|
break;
|
}
|
}
|
TRACE_(jtag)("set_devint_reg %08x = %08lx\n", address, data);
|
TRACE_(jtag)("set_devint_reg %08x = %"PRIx32"\n", address, data);
|
return err;
|
return err;
|
}
|
}
|
|
|
/* Gets development interface register */
|
/* Gets development interface register */
|
int get_devint_reg(unsigned int address,unsigned long *data)
|
int get_devint_reg(unsigned int address, uint32_t *data)
|
{
|
{
|
int err = 0;
|
int err = 0;
|
unsigned long value = 0;
|
unsigned long value = 0;
|
|
|
switch(address) {
|
switch(address) {
|
| Line 361... |
Line 365... |
*data = value;
|
*data = value;
|
return err;
|
return err;
|
}
|
}
|
|
|
/* Writes to bus address */
|
/* Writes to bus address */
|
int debug_set_mem (unsigned int address,unsigned long data)
|
int debug_set_mem (oraddr_t address, uint32_t data)
|
{
|
{
|
int err = 0;
|
int err = 0;
|
TRACE_(jtag)("MEMWRITE (%08x) = %08lx\n", address, data);
|
TRACE_(jtag)("MEMWRITE (%"PRIxADDR") = %"PRIx32"\n", address, data);
|
|
|
|
|
if(!verify_memoryarea(address))
|
if(!verify_memoryarea(address))
|
err = JTAG_PROXY_INVALID_ADDRESS;
|
err = JTAG_PROXY_INVALID_ADDRESS;
|
else {
|
else {
|
| Line 378... |
Line 382... |
}
|
}
|
return err;
|
return err;
|
}
|
}
|
|
|
/* Reads from bus address */
|
/* Reads from bus address */
|
int debug_get_mem(unsigned int address,unsigned long *data)
|
int debug_get_mem(oraddr_t address, uorreg_t *data)
|
{
|
{
|
int err = 0;
|
int err = 0;
|
if(!verify_memoryarea(address))
|
if(!verify_memoryarea(address))
|
err = JTAG_PROXY_INVALID_ADDRESS;
|
err = JTAG_PROXY_INVALID_ADDRESS;
|
else
|
else
|
{
|
{
|
*data=eval_direct32(address, 0, 0);
|
*data=eval_direct32(address, 0, 0);
|
}
|
}
|
TRACE_(jtag)("MEMREAD (%08x) = %08lx\n", address, *data);
|
TRACE_(jtag)("MEMREAD (%"PRIxADDR") = %"PRIxADDR"\n", address, *data);
|
return err;
|
return err;
|
}
|
}
|
|
|
/* debug_ignore_exception returns 1 if the exception should be ignored. */
|
/* debug_ignore_exception returns 1 if the exception should be ignored. */
|
int debug_ignore_exception (unsigned long except)
|
int debug_ignore_exception (unsigned long except)
|
