| Line 81... |
Line 81... |
struct dma_controller *dma = &(dmas[i]);
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struct dma_controller *dma = &(dmas[i]);
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if ( dma->baseaddr == 0 )
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if ( dma->baseaddr == 0 )
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continue;
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continue;
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printf( "\nDMA controller %u at 0x%08X:\n", i, dma->baseaddr );
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PRINTF( "\nDMA controller %u at 0x%08X:\n", i, dma->baseaddr );
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printf( "CSR : 0x%08lX\n", dma->regs.csr );
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PRINTF( "CSR : 0x%08lX\n", dma->regs.csr );
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printf( "INT_MSK_A : 0x%08lX\n", dma->regs.int_msk_a );
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PRINTF( "INT_MSK_A : 0x%08lX\n", dma->regs.int_msk_a );
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printf( "INT_MSK_B : 0x%08lX\n", dma->regs.int_msk_b );
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PRINTF( "INT_MSK_B : 0x%08lX\n", dma->regs.int_msk_b );
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printf( "INT_SRC_A : 0x%08lX\n", dma->regs.int_src_a );
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PRINTF( "INT_SRC_A : 0x%08lX\n", dma->regs.int_src_a );
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printf( "INT_SRC_B : 0x%08lX\n", dma->regs.int_src_b );
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PRINTF( "INT_SRC_B : 0x%08lX\n", dma->regs.int_src_b );
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for ( j = 0; j < DMA_NUM_CHANNELS; ++ j ) {
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for ( j = 0; j < DMA_NUM_CHANNELS; ++ j ) {
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struct dma_channel *channel = &(dma->ch[j]);
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struct dma_channel *channel = &(dma->ch[j]);
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if ( !channel->referenced )
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if ( !channel->referenced )
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continue;
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continue;
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printf( "CH%u_CSR : 0x%08lX\n", j, channel->regs.csr );
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PRINTF( "CH%u_CSR : 0x%08lX\n", j, channel->regs.csr );
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printf( "CH%u_SZ : 0x%08lX\n", j, channel->regs.sz );
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PRINTF( "CH%u_SZ : 0x%08lX\n", j, channel->regs.sz );
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printf( "CH%u_A0 : 0x%08lX\n", j, channel->regs.a0 );
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PRINTF( "CH%u_A0 : 0x%08lX\n", j, channel->regs.a0 );
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printf( "CH%u_AM0 : 0x%08lX\n", j, channel->regs.am0 );
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PRINTF( "CH%u_AM0 : 0x%08lX\n", j, channel->regs.am0 );
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printf( "CH%u_A1 : 0x%08lX\n", j, channel->regs.a1 );
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PRINTF( "CH%u_A1 : 0x%08lX\n", j, channel->regs.a1 );
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printf( "CH%u_AM1 : 0x%08lX\n", j, channel->regs.am1 );
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PRINTF( "CH%u_AM1 : 0x%08lX\n", j, channel->regs.am1 );
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printf( "CH%u_DESC : 0x%08lX\n", j, channel->regs.desc );
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PRINTF( "CH%u_DESC : 0x%08lX\n", j, channel->regs.desc );
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printf( "CH%u_SWPTR : 0x%08lX\n", j, channel->regs.swptr );
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PRINTF( "CH%u_SWPTR : 0x%08lX\n", j, channel->regs.swptr );
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}
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}
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}
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}
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}
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}
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