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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [peripheral/] [mc.c] - Diff between revs 1519 and 1557

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Rev 1519 Rev 1557
Line 51... Line 51...
  int mc;
  int mc;
  struct mc_area *next;
  struct mc_area *next;
};
};
 
 
struct mc {
struct mc {
  unsigned long csr;
  uint32_t csr;
  unsigned long poc;
  uint32_t poc;
  unsigned long ba_mask;
  uint32_t ba_mask;
  unsigned long csc[N_CE];
  uint32_t csc[N_CE];
  unsigned long tms[N_CE];
  uint32_t tms[N_CE];
  oraddr_t baseaddr;
  oraddr_t baseaddr;
  int enabled;
  int enabled;
 
 
  /* Index of this memory controler amongst all the memory controlers */
  /* Index of this memory controler amongst all the memory controlers */
  int index;
  int index;
Line 73... Line 73...
 
 
/* List used to temporarily hold memory areas registered with the mc, while the
/* List used to temporarily hold memory areas registered with the mc, while the
 * mc configureation has not been loaded */
 * mc configureation has not been loaded */
static struct mc_area *mc_areas = NULL;
static struct mc_area *mc_areas = NULL;
 
 
void set_csc_tms (int cs, unsigned long csc, unsigned long tms, struct mc *mc)
void set_csc_tms (int cs, uint32_t csc, uint32_t tms, struct mc *mc)
{
{
  struct mc_area *cur = mc->mc_areas;
  struct mc_area *cur = mc->mc_areas;
 
 
  while (cur) {
  while (cur) {
    if (cur->cs == cs) {
    if (cur->cs == cs) {
Line 233... Line 233...
{
{
    struct mc *mc = dat;
    struct mc *mc = dat;
    int i;
    int i;
 
 
    PRINTF( "\nMemory Controller at 0x%"PRIxADDR":\n", mc->baseaddr );
    PRINTF( "\nMemory Controller at 0x%"PRIxADDR":\n", mc->baseaddr );
    PRINTF( "POC: 0x%08lX\n", mc->poc );
    PRINTF( "POC: 0x%"PRIx32"\n", mc->poc );
    PRINTF( "BAS: 0x%08lX\n", mc->ba_mask );
    PRINTF( "BAS: 0x%"PRIx32"\n", mc->ba_mask );
    PRINTF( "CSR: 0x%08lX\n", mc->csr );
    PRINTF( "CSR: 0x%"PRIx32"\n", mc->csr );
 
 
    for (i=0; i<N_CE; i++) {
    for (i=0; i<N_CE; i++) {
        PRINTF( "CE %02d -  CSC: 0x%08lX  TMS: 0x%08lX\n", i, mc->csc[i],
        PRINTF( "CE %02d -  CSC: 0x%"PRIx32"  TMS: 0x%"PRIx32"\n", i,
               mc->tms[i]);
                mc->csc[i], mc->tms[i]);
    }
    }
}
}
 
 
/*--------------------------------------------[ Peripheral<->MC interface ]---*/
/*--------------------------------------------[ Peripheral<->MC interface ]---*/
/* Registers some memory to be under the memory controllers control */
/* Registers some memory to be under the memory controllers control */

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