OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [peripheral/] [ps2kbd.c] - Diff between revs 1469 and 1486

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 1469 Rev 1486
Line 132... Line 132...
 
 
/* Write a register */
/* Write a register */
void kbd_write8 (oraddr_t addr, uint32_t value, void *dat)
void kbd_write8 (oraddr_t addr, uint32_t value, void *dat)
{
{
  struct kbd_state *kbd = dat;
  struct kbd_state *kbd = dat;
  int a = (addr - kbd->baseaddr);
  switch (addr) {
  switch (a) {
 
    case KBD_CTRL:
    case KBD_CTRL:
      kbd->ccmd = value & 0xff;
      kbd->ccmd = value & 0xff;
      if (kbd->ccmd == KBD_CCMD_RCB)
      if (kbd->ccmd == KBD_CCMD_RCB)
          kbd->kresp = 0x1;
          kbd->kresp = 0x1;
      if (kbd->ccmd == KBD_CCMD_ST1)
      if (kbd->ccmd == KBD_CCMD_ST1)
Line 174... Line 173...
 
 
/* Read a register */
/* Read a register */
uint32_t kbd_read8 (oraddr_t addr, void *dat)
uint32_t kbd_read8 (oraddr_t addr, void *dat)
{
{
  struct kbd_state *kbd = dat;
  struct kbd_state *kbd = dat;
  int a = (addr - kbd->baseaddr);
  switch (addr) {
  switch (a) {
 
    case KBD_CTRL: {
    case KBD_CTRL: {
      unsigned long c = 0x0;
      unsigned long c = 0x0;
      if (kbd->kresp || kbd->buf_count)
      if (kbd->kresp || kbd->buf_count)
        c |= KBD_STATUS_OBF;
        c |= KBD_STATUS_OBF;
      c |= kbd->ccmdbyte & KBD_CCMDBYTE_SYS;
      c |= kbd->ccmdbyte & KBD_CCMDBYTE_SYS;
Line 340... Line 338...
}
}
 
 
void kbd_sec_end(void *dat)
void kbd_sec_end(void *dat)
{
{
  struct kbd_state *kbd = dat;
  struct kbd_state *kbd = dat;
 
  struct mem_ops ops;
 
 
  if(!kbd->enabled) {
  if(!kbd->enabled) {
    free(dat);
    free(dat);
    return;
    return;
  }
  }
 
 
  register_memoryarea(kbd->baseaddr, KBD_SPACE, 1, 0, kbd_read8, kbd_write8, dat);
  memset(&ops, 0, sizeof(struct mem_ops));
 
 
 
  ops.readfunc8 = kbd_read8;
 
  ops.writefunc8 = kbd_write8;
 
  ops.read_dat8 = dat;
 
  ops.write_dat8 = dat;
 
 
 
  /* FIXME: Correct delay? */
 
  ops.delayr = 2;
 
  ops.delayw = 2;
 
 
 
  reg_mem_area(kbd->baseaddr, KBD_SPACE, 0, &ops);
  reg_sim_reset(kbd_reset, dat);
  reg_sim_reset(kbd_reset, dat);
  reg_sim_stat(kbd_info, dat);
  reg_sim_stat(kbd_info, dat);
}
}
 
 
void reg_kbd_sec(void)
void reg_kbd_sec(void)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.