OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [peripheral/] [vga.c] - Diff between revs 1484 and 1486

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 1484 Rev 1486
Line 53... Line 53...
/* Write a register */
/* Write a register */
void vga_write32(oraddr_t addr, uint32_t value, void *dat)
void vga_write32(oraddr_t addr, uint32_t value, void *dat)
{
{
  struct vga_state *vga = dat;
  struct vga_state *vga = dat;
 
 
  addr -= vga->baseaddr;
 
 
 
  switch (addr) {
  switch (addr) {
    case VGA_CTRL:  vga->ctrl = value; break;
    case VGA_CTRL:  vga->ctrl = value; break;
    case VGA_STAT:  vga->stat = value; break;
    case VGA_STAT:  vga->stat = value; break;
    case VGA_HTIM:  vga->htim = value; break;
    case VGA_HTIM:  vga->htim = value; break;
    case VGA_VTIM:  vga->vtim = value; break;
    case VGA_VTIM:  vga->vtim = value; break;
Line 81... Line 79...
/* Read a register */
/* Read a register */
uint32_t vga_read32(oraddr_t addr, void *dat)
uint32_t vga_read32(oraddr_t addr, void *dat)
{
{
  struct vga_state *vga = dat;
  struct vga_state *vga = dat;
 
 
  addr -= vga->baseaddr;
 
 
 
  switch (addr) {
  switch (addr) {
    case VGA_CTRL:  return vga->ctrl;
    case VGA_CTRL:  return vga->ctrl;
    case VGA_STAT:  return vga->stat;
    case VGA_STAT:  return vga->stat;
    case VGA_HTIM:  return vga->htim;
    case VGA_HTIM:  return vga->htim;
    case VGA_VTIM:  return vga->vtim;
    case VGA_VTIM:  return vga->vtim;
Line 284... Line 280...
}
}
 
 
void vga_sec_end(void *dat)
void vga_sec_end(void *dat)
{
{
  struct vga_state *vga = dat;
  struct vga_state *vga = dat;
 
  struct mem_ops ops;
 
 
  if(!vga->enabled) {
  if(!vga->enabled) {
    free(dat);
    free(dat);
    return;
    return;
  }
  }
 
 
  if (vga->baseaddr)
  memset(&ops, 0, sizeof(struct mem_ops));
    register_memoryarea(vga->baseaddr, VGA_ADDR_SPACE, 4, 0, vga_read32, vga_write32, dat);
 
 
  ops.readfunc32 = vga_read32;
 
  ops.writefunc32 = vga_write32;
 
  ops.write_dat32 = dat;
 
  ops.read_dat32 = dat;
 
 
 
  /* FIXME: Correct delay? */
 
  ops.delayr = 2;
 
  ops.delayw = 2;
 
 
 
  reg_mem_area(vga->baseaddr, VGA_ADDR_SPACE, 0, &ops);
 
 
  reg_sim_reset(vga_reset, dat);
  reg_sim_reset(vga_reset, dat);
}
}
 
 
void reg_vga_sec(void)
void reg_vga_sec(void)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.