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/* sim.cfg -- Simulator configuration script file
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/* sim.cfg -- Simulator configuration script file
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Copyright (C) 2001, Marko Mlinar, markom@opencores.org
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Copyright (C) 2001, Marko Mlinar, markom@opencores.org
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This file includes a lot of help about configurations and default one
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* INTRODUCTION
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The or1ksim have various parameters, which can be set in configuration
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files. Multiple configurations may be used and switched between at
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or1ksim startup.
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By default, or1ksim loads condfiguration file from './sim.cfg' and if not
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found it checks '~/.or1k/sim.cfg'. If even this file is not found or
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all parameters are not defined, default configuration is used.
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Users should not rely on default configuration, but rather redefine all
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critical settings, since default configuration may differ in newer
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versions of the or1ksim.
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If multiple configurations are used, user can switch between them by
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supplying -f option when starting simulator.
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This file may contain (standard C) only comments - no // support.
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Like normal configuration file, this file is divided in sections,
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where each section is described in detail also.
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Some section also have subsections. One example of such subsection is
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block:
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device
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instance specific parameters...
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enddevice
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which creates a device instance.
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*/
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/* MEMORY SECTION
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This section specifies how is initial memory generated and which blocks
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it consist of.
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memory_table_file = ""
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loads memory table from filename. If filename does not exists in the
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current directory, it is loaded from ~/.or1k/.
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Memory table file structure is as follows:
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start_address1 length1 type1 [ce1 [delayr1 [delayw1]]]
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start_address2 length2 type2 [ce2 [delayr2 [delayw2]]]
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start_address3 length3 type3 [ce3 [delayr3 [delayw3]]]
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Example:
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00000100 00001F00 flash 3 100
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80000000 00010000 RAM
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type = random/unknown/pattern
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specifies the initial memory values. 'random' parameter generate
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random memory using seed 'random_seed' parameter. 'pattern' parameter
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fills memory with 'pattern' parameter and 'unknown' does not specify
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how memory should be generated - the fastest option.
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random_seed =
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random seed for randomizer, used if type = random
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pattern =
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pattern to fill memory, , used if type = pattern
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*/
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section memory
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section memory
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memory_table_file = "simmem.cfg"
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memory_table_file = "simmem.cfg"
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/*random_seed = 12345
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/*random_seed = 12345
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type = random*/
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type = random*/
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pattern = 0x00
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pattern = 0x00
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type = unknown /* Fastest */
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type = unknown /* Fastest */
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end
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end
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/* SIM SECTION
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This section specifies how should sim behave.
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verbose = 0/1
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whether to print out extra messages
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debug = 0/1
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whether to print out sim debug information
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profile = 0/1
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whether to generate profiling file 'sim.profile'
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prof_fn = ""
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filename, where to generate profiling info, used
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only if 'profile' is set
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iprompt = 0/1
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whether we strart in interactive prompt
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exe_log = 0/1
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whether execution log should be generated
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exe_log_fn = ""
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where to put execution log in, used only if 'exe_log'
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is set
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section sim
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/*verbose = 1*/
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debug = 0
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profile = 0
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prof_fn = "sim.profile"
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/* iprompt = 0 */
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exe_log = 0
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exe_log_fn = "executed.log"
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end
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/* SECTION VAPI
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This section configures Verification API, used for Advanced
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Core Verification.
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enabled = 0/1
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whether to start VAPI server
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server_port =
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TCP/IP port to start VAPI server on
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*/
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section VAPI
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enabled = 0
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server_port = 9998
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end
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/* CPU SECTION
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This section specifies various CPU parameters.
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ver =
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rev =
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specifies version and revision of the CPU used
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upr =
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changes the upr register
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superscalar = 0/1
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hazards = 0/1
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history = 0/1
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dependstats = 0/1
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dependency = 0/1
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slp = 0/1
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btic = 0/1
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bpb = 0/1
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parameters for CPU analysis
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*/
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section cpu
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section cpu
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ver = 0x1200
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ver = 0x1200
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rev = 0x0001
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rev = 0x0001
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/* upr = */
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/* upr = */
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superscalar = 0
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superscalar = 0
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slp = 0
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slp = 0
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btic = 0
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btic = 0
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bpb = 0
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bpb = 0
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end
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end
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/* DEBUG SECTION
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This sections specifies how debug unit should behave.
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enabled = 0/1
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whether debug unit is enabled
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gdb_enabled = 0/1
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whether to start gdb server at 'server_port' port
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server_port =
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TCP/IP port to start gdb server on, used only if gdb_enabled
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is set
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section debug
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section debug
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/*enabled = 0
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enabled = 0
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gdb_enabled = 0*/
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gdb_enabled = 0
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server_port = 9999
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server_port = 9999
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end
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end
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section sim
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/*verbose*/
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debug = 0
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profile = 0
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prof_fn = "sim.profile"
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/* iprompt = 0 */
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/* MC SECTION
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exe_log = 0
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exe_log_fn = "executed.log"
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This section configures the memory controller
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end
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enabled = 0/1
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whether memory controller is enabled
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baseaddr =
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address of first MC register
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POC =
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Power On Configuration register
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*/
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section mc
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section mc
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enabled = 0
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enabled = 0
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baseaddr = 0xa0000000
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baseaddr = 0xa0000000
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POC = 0x00000008 /* Power on configuration register */
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POC = 0x00000008 /* Power on configuration register */
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end
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end
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/* UART SECTION
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This section configures UARTs
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enabled = 0/1
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whether uarts are enabled
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nuarts =
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make specified number of instances, configure each
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instance within device - enddevice construct.
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instance specific:
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baseaddr =
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address of first UART register for this device
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rx_file = ""
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filename, where to read data from
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tx_file = ""
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filename, where to write data to
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jitter =
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in msecs... time to block, -1 to disable it
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*/
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section uart
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section uart
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enabled = 0
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enabled = 0
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nuarts = 1
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nuarts = 1
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device 0
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device 0
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txfile = "/tmp/uart0.tx"
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txfile = "/tmp/uart0.tx"
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jitter = -1 /* async behaviour */
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jitter = -1 /* async behaviour */
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enddevice
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enddevice
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end
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end
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/* DMA SECTION
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This section configures DMAs
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enabled = 0/1
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whether DMAs are enabled
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ndmas =
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make specified number of instances, configure each
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instance within device - enddevice construct.
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instance specific:
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baseaddr =
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address of first DMA register for this device
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irq =
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irq number for this device
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*/
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section dma
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section dma
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enabled = 0
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enabled = 0
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ndmas = 1
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ndmas = 1
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device 0
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device 0
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baseaddr = 0x90000000
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baseaddr = 0x90000000
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irq = 4
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irq = 4
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enddevice
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enddevice
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end
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end
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section VAPI
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enabled = 0
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/* ETHERNET SECTION
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server_port = 9998
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end
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This section configures ethernets
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enabled = 0/1
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whether ethernets are enabled
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nethernets =
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make specified number of instances, configure each
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instance within device - enddevice construct.
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instance specific:
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baseaddr =
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address of first ethernet register for this device
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dma =
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which controller is this ethernet "connected" to
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rx_channel =
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DMA channel used for RX
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tx_channel =
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DMA channel used for TX
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rx_file = ""
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filename, where to read data from
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tx_file = ""
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filename, where to write data to
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*/
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section ethernet
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section ethernet
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enabled = 0
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enabled = 0
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nethernets = 1
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nethernets = 1
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