OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [config/] [or1k/] [tm-or1k.h] - Diff between revs 107 and 113

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 107 Rev 113
Line 33... Line 33...
    unsigned int VR;
    unsigned int VR;
    /* Units present.  */
    /* Units present.  */
    unsigned int UPR;
    unsigned int UPR;
    /* Number of total available matchpoints in this implementation.  */
    /* Number of total available matchpoints in this implementation.  */
    unsigned int num_matchpoints;
    unsigned int num_matchpoints;
 
    /* Number of currently used matchpoints.  */
 
    unsigned int num_used_matchpoints;
    /* Number of registers.  */
    /* Number of registers.  */
    unsigned int num_gpr_regs;
    unsigned int num_gpr_regs;
    unsigned int num_vf_regs;
    unsigned int num_vf_regs;
    int vf_present;
    int vf_present;
 };
 };
Line 49... Line 51...
    /* Init target.  */
    /* Init target.  */
    void (*to_init) PARAMS ((char *args));
    void (*to_init) PARAMS ((char *args));
    /* Destruct target.  */
    /* Destruct target.  */
    void (*to_done) PARAMS ((void));
    void (*to_done) PARAMS ((void));
 
 
    /* Read SPR register.
    /* Read register.
       Does not fail, places error no. in err instead or call error().  */
       Does not fail, places error no. in err instead or call error(), if fatal.  */
    unsigned int (*to_read_spr_reg) PARAMS ((unsigned int regno));
    unsigned long long int (*to_read_reg) PARAMS ((unsigned int regno));
    /* Write SPR register.
    /* Write register.
       Does not fail, places error no. in err instead or call error().  */
       Does not fail, places error no. in err instead or call error(), if fatal.  */
    void (*to_write_spr_reg) PARAMS ((unsigned int regno, unsigned int value));
    void (*to_write_reg) PARAMS ((unsigned int regno, unsigned long long int value));
 
 
    /* Read TAP register.
    /* Selects scan chain.  All register accesses are related to current scan chain.
       Does not fail, places error no. in err instead or call error().  */
       Does not fail, places error no. in err instead or call error(), if fatal.
    unsigned int (*to_read_tap_reg) PARAMS ((unsigned int regno));
       See jtag_chains enum.  */
    /* Write TAP register.
    void (*to_set_chain) PARAMS ((int chain));
       Does not fail, places error no. in err instead or call error().  */
 
    void (*to_write_tap_reg) PARAMS ((unsigned int regno, unsigned int value));
 
 
 
    /* Executes extended command on the target.  */
    /* Executes extended command on the target.  */
    void (*to_exec_command) PARAMS ((char *args, int from_tty));
    void (*to_exec_command) PARAMS ((char *args, int from_tty));
 
 
    /* Associated target_ops.  */
    /* Associated target_ops.  */
Line 75... Line 75...
  };
  };
 
 
 
 
#define DEFAULT_PROMPT "(or1k) "
#define DEFAULT_PROMPT "(or1k) "
 
 
 
/* Context stuff. */
 
#define CURRENT_CID (0)
 
#define MAX_CID     (15)
 
 
 
 
 
/* Instruction definitions. */
 
#define BRK_INSTR_STRUCT {0x21, 0x00, 0x00, 0x00}
 
#define NOP_INSTR (0x15000000)
 
 
/* Special purpose regisers.  */
/* Special purpose regisers.  */
#define SPR_GROUP_SIZE_BITS (16)
#define SPR_GROUP_SIZE_BITS (11)
#define SPR_GROUP_SIZE (1 << SPR_GROUP_SIZE_BITS)
#define SPR_GROUP_SIZE (1 << SPR_GROUP_SIZE_BITS)
#define SPR_SYSTEM_GROUP (0)
#define SPR_SYSTEM_GROUP (0)
#define SPR_DEBUG_GROUP (6)
#define SPR_DEBUG_GROUP (6)
#define SPR_GPR  (24)
#define SPR_GPR  (1024)
#define SPR_VFPR (24+32)
#define SPR_VFPR ((MAX_CID + 1) * MAX_GPR_REGS + SPR_GPR)
#define OR1K_NUM_SPR_GROUPS 11
#define OR1K_NUM_SPR_GROUPS (11)
 
 
/* Define register values.  */
/* Define register values.  */
#define SPR_REG(group, index) (((group) << SPR_GROUP_SIZE_BITS) + (index))
#define SPR_REG(group, index) (((group) << SPR_GROUP_SIZE_BITS) + (index))
 
 
#define VR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 1)
#define VR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 1)
#define UPR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 2)
#define UPR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 2)
#define SR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 3)
#define SR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 3)
#define CCR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP, 4+cid)
#define CCR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP, 4 + (cid))
#define DVR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0)
#define DVR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0)
#define DCR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 8)
#define DCR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 8)
#define DMR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 16)
#define DMR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 16)
#define DMR2_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 17)
#define DMR2_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 17)
#define DCWR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 18)
#define DCWR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 18)
#define DCWR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 19)
#define DCWR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 19)
#define DSR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 20)
#define DSR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 20)
#define DRR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 21)
#define DRR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 21)
#define PC_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 22)
#define DIR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 22)
 
#define PC_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 2)
#define ZERO_REGNUM (0)
#define ZERO_REGNUM (0)
#define SP_REGNUM (1)
#define SP_REGNUM (1)
#define FP_REGNUM (2)
#define FP_REGNUM (2)
#define A0_REGNUM (3)
#define A0_REGNUM (3)
#define A5_REGNUM (8)
#define A5_REGNUM (8)
#define LR_REGNUM (9)
#define LR_REGNUM (9)
#define RV_REGNUM (11)
#define RV_REGNUM (11)
#define VFA0_REGNUM (32+0)
#define VFA0_REGNUM (MAX_GPR_REGS + 0)
#define VFA5_REGNUM (32+5)
#define VFA5_REGNUM (MAX_GPR_REGS + 5)
#define VFRV_REGNUM (32+6)
#define VFRV_REGNUM (MAX_GPR_REGS + 6)
#define PC_REGNUM (64+0)
#define PC_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 0)
#define PS_REGNUM (64+1)
#define PS_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 1)
#define CCR_REGNUM (64+2)
#define CCR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 2)
 
 
extern int or1k_regnum_to_sprnum PARAMS ((int regno));
extern int or1k_regnum_to_sprnum PARAMS ((int regno));
#define REGNUM_TO_SPRNUM(regno) (or1k_regnum_to_sprnum(regno))
#define REGNUM_TO_SPRNUM(regno) (or1k_regnum_to_sprnum(regno))
 
 
/* Defines for SPR bits.  */
/* Defines for SPR bits.  */
Line 165... Line 175...
/* Size (in bytes) of registers.  */
/* Size (in bytes) of registers.  */
 
 
#define OR1K_SPR_REGSIZE (4)
#define OR1K_SPR_REGSIZE (4)
#define OR1K_VF_REGSIZE (8)
#define OR1K_VF_REGSIZE (8)
#define OR1K_GPR_REGSIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))
#define OR1K_GPR_REGSIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))
 
#define OR1K_VF_DOUBLE (0)
 
 
#define OR1K_IS_GPR(N) ((N) >= 0 && (N) < NUM_GPR_REGS)
#define OR1K_IS_GPR(N) ((N) >= 0 && (N) < MAX_GPR_REGS)
#define OR1K_IS_VF(N) ((N) >= NUM_GPR_REGS && (N) < NUM_GPR_REGS + NUM_VF_REGS)
#define OR1K_IS_VF(N) ((N) >= MAX_GPR_REGS && (N) < MAX_GPR_REGS + MAX_VF_REGS)
 
 
/* Register representation is the same as in memory.  */
/* Register representation is the same as in memory.  */
 
 
#define REGISTER_CONVERTIBLE(N) (0)
#define REGISTER_CONVERTIBLE(N) (0)
 
 
Line 198... Line 209...
#define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))
#define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))
 
 
/* Return the GDB type object for the "standard" data type of data in
/* Return the GDB type object for the "standard" data type of data in
   register N.  */
   register N.  */
 
 
#ifndef REGISTER_VIRTUAL_TYPE
 
#define REGISTER_VIRTUAL_TYPE(N) ((OR1K_IS_GPR(N))?(\
#define REGISTER_VIRTUAL_TYPE(N) ((OR1K_IS_GPR(N))?(\
(OR1K_64BIT_IMPLEMENTATION)?(builtin_type_int64):(builtin_type_int)\
(OR1K_64BIT_IMPLEMENTATION)?builtin_type_int64:builtin_type_int\
):(builtin_type_uint32))
):(OR1K_IS_VF(N) ? builtin_type_float : builtin_type_uint32))
#endif
 
 
 
 
 
/* Largest value REGISTER_RAW_SIZE can have.  */
/* Largest value REGISTER_RAW_SIZE can have.  */
 
 
#define MAX_REGISTER_RAW_SIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))
#define MAX_REGISTER_RAW_SIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))
 
 
Line 236... Line 244...
/* Total amount of space needed to store our copies of the machine's
/* Total amount of space needed to store our copies of the machine's
   register state, the array `registers'.  */
   register state, the array `registers'.  */
 
 
#define REGISTER_BYTES (NUM_REGS * OR1K_SPR_REGSIZE)
#define REGISTER_BYTES (NUM_REGS * OR1K_SPR_REGSIZE)
 
 
 
extern void or1k_do_registers_info PARAMS ((int, int));
 
#define DO_REGISTERS_INFO(regnum, fp) or1k_do_registers_info(regnum, fp)
 
 
 
 
 
 
/* BREAKPOINT_FROM_PC uses the program counter value to determine whether a
/* BREAKPOINT_FROM_PC uses the program counter value to determine whether a
   16- or 32-bit breakpoint should be used.  It returns a pointer
   16- or 32-bit breakpoint should be used.  It returns a pointer
   to a string of bytes that encode a breakpoint instruction, stores
   to a string of bytes that encode a breakpoint instruction, stores
   the length of the string to *lenptr, and adjusts the pc (if necessary) to
   the length of the string to *lenptr, and adjusts the pc (if necessary) to
   point to the actual memory location where the breakpoint should be
   point to the actual memory location where the breakpoint should be
Line 257... Line 270...
   This is often the number of bytes in BREAKPOINT
   This is often the number of bytes in BREAKPOINT
   but not always.  */
   but not always.  */
 
 
#define DECR_PC_AFTER_BREAK 0
#define DECR_PC_AFTER_BREAK 0
 
 
 
extern int or1k_insert_breakpoint (CORE_ADDR addr, char *contents_cache);
 
#define target_insert_hw_breakpoint(addr, cache) or1k_insert_breakpoint (addr, cache)
 
 
 
extern int or1k_remove_breakpoint (CORE_ADDR addr, char *contents_cache);
 
#define target_remove_hw_breakpoint(addr, cache) or1k_remove_breakpoint (addr, cache)
 
 
 
/* Watchpoint support.  */
 
 
 
#define TARGET_HAS_HARDWARE_WATCHPOINTS
 
 
 
/* Use these macros for watchpoint insertion/deletion.  */
 
/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
 
extern int or1k_insert_watchpoint PARAMS ((CORE_ADDR addr, int len, int type));
 
#define target_insert_watchpoint(addr, len, type) \
 
        or1k_insert_watchpoint (addr, len, type)
 
 
 
extern int or1k_insert_watchpoint PARAMS ((CORE_ADDR addr, int len, int type));
 
#define target_remove_watchpoint(addr, len, type) \
 
        or1k_remove_watchpoint (addr, len, type)
 
 
 
/* We need to remove watchpoints when stepping, else we hit them again! */
 
#define HAVE_NONSTEPPABLE_WATCHPOINT
 
 
 
extern int or1k_stopped_by_watchpoint PARAMS ((void));
 
#define STOPPED_BY_WATCHPOINT(w) or1k_stopped_by_watchpoint ()
 
 
 
//#include "breakpoint.h"
 
typedef enum bptype;
 
extern int or1k_can_use_hardware_watchpoint PARAMS ((enum bptype, int));
 
#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(bp_type, cnt, ot) \
 
  or1k_can_use_hardware_watchpoint(bp_type, cnt)
 
 
 
 
 
/* Catchpoint support.  */
 
/* HACK: how do we hook to signal namings otherwise? */
 
#include "target.h"
 
extern char *target_signal_to_string PARAMS ((enum target_signal));
 
/* Return the name (SIGHUP, etc.) for a signal.  */
 
extern char *or1k_signal_to_name PARAMS ((enum target_signal));
 
/* Given a name (SIGHUP, etc.), return its signal.  */
 
extern enum target_signal or1k_signal_from_name PARAMS ((char *));
 
 
 
#define NUM_OR1K_SIGNALS (10)
 
 
/* Extract from an array REGBUF containing the (raw) register state
/* Extract from an array REGBUF containing the (raw) register state
   a function return value of type TYPE, and copy that, in virtual format,
   a function return value of type TYPE, and copy that, in virtual format,
   into VALBUF.  */
   into VALBUF.  */
 
 
extern void or1k_extract_return_value PARAMS ((struct type *, char[], char *));
extern void or1k_extract_return_value PARAMS ((struct type *, char[], char *));
Line 438... Line 495...
 
 
/* Compare operand to compare DVRx to.  */
/* Compare operand to compare DVRx to.  */
 
 
enum enum_compare_to
enum enum_compare_to
  {
  {
    CT_DISABLED, CT_FETCH, CT_LEA, CT_SEA, CT_LDATA, CT_SDATA
    CT_DISABLED, CT_FETCH, CT_LEA, CT_SEA, CT_LDATA, CT_SDATA, CT_ADATA
  };
  };
 
 
 
 
/* DRCx struct */
/* DRCx struct */
struct dcr_struct
struct dcr_struct
  {
  {
    int dp:1;
 
    enum enum_compare_condition cc:3;
 
    int sc:1;
 
    enum enum_compare_to ct:3;
    enum enum_compare_to ct:3;
 
    unsigned int sc:1;
 
    enum enum_compare_condition cc:3;
 
    unsigned int dp:1;
  };
  };
 
 
/* Possible errors are listed here.  */
/* Possible errors are listed here.  */
 
 
enum enum_errors
enum enum_errors
  {
  {
    ERR_NONE, ERR_CRC
    ERR_NONE, ERR_CRC
  };
  };
 
 
 
enum jtag_chains
 
  {
 
    SC_GLOBAL,      /* 0 Global BS Chain */
 
    SC_RISC_DEBUG,  /* 1 RISC Debug Interface chain */
 
    SC_RISC_TEST,   /* 2 RISC Test Chain */
 
    SC_TRACE,       /* 3 Trace Chain */
 
    SC_REGISTER,    /* Register Chain */
 
    SC_BLOCK,       /* Block Chains */
 
  };
 
 
 
/* JTAG registers.  */
 
#define JTAG_RISCOP (0x9)
 
 
extern const char *or1k_err_name PARAMS ((int e));
extern const char *or1k_err_name PARAMS ((int e));
 
 
extern struct struct_or1k_implementation or1k_implementation;
extern struct struct_or1k_implementation or1k_implementation;
extern unsigned int or1k_fetch_instruction PARAMS ((CORE_ADDR addr));
extern unsigned int or1k_fetch_instruction PARAMS ((CORE_ADDR addr));
extern void or1k_fetch_registers PARAMS ((int regno));
extern void or1k_fetch_registers PARAMS ((int regno));
 
 
/* Sets register/memory regno to data.  */
/* Sets register/memory regno to data.  */
extern void or1k_write_reg PARAMS ((unsigned int regno, unsigned int data));
extern void or1k_write_spr_reg PARAMS ((unsigned int regno, unsigned int data));
 
 
/* Sets register/memory regno to data.  */
/* Sets register/memory regno to data.  */
extern unsigned int or1k_read_reg PARAMS ((unsigned int regno));
extern unsigned int or1k_read_spr_reg PARAMS ((unsigned int regno));
extern int err;
extern int err;
 
 
 
extern void or1k_flush_pipeline PARAMS ((void));
 
 
#endif /* TM_OR1K_H */
#endif /* TM_OR1K_H */
 
 
 No newline at end of file
 No newline at end of file

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.