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[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [config/] [or1k/] [tm-or1k.h] - Diff between revs 362 and 363

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Line 26... Line 26...
#endif
#endif
 
 
#include "defs.h"
#include "defs.h"
#include <inttypes.h>  /* CZ */
#include <inttypes.h>  /* CZ */
 
 
/* CZ 11/09/01  -- Cause GDB to expect actual PC value to appear
 
   in breakpoint exception vector instead of being in PC itself */
 
 
 
#define NEW_PC_HANDLING
 
 
 
#ifdef NEW_PC_HANDLING
 
#define TARGET_READ_PC(pid) or1k_target_read_pc(pid)
 
#define TARGET_WRITE_PC(pc,pid) or1k_target_write_pc(pc,pid)
 
#endif
 
 
 
 
 
struct value;
struct value;
 
 
struct struct_or1k_implementation
struct struct_or1k_implementation
  {
  {
    /* Implementation version.  */
    /* Implementation version.  */
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#define PC_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 0)
#define PC_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 0)
#define PS_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 1)
#define PS_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 1)
#define EPCR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 2)
#define EPCR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 2)
#define CCR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 2)
#define CCR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 2)
 
 
/*******************************************/
 
/* Added by CZ on 12/09/01 Used for new style breakpoints */
 
/* These really aren't designed to be seen by the user    */
 
#define EPC_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 3)
 
#define EAR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 4)
 
#define ESR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 5)
 
 
 
#define EPC_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP,32+cid)
 
#define EAR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP,48+cid)
 
#define ESR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP,64+cid)
 
 
 
#define MAX_EXTRA_NUM_REGS 6
 
 
 
/******** END OF ADDITIONS BY CZ ************/
/******** END OF ADDITIONS BY CZ ************/
 
 
extern int or1k_regnum_to_sprnum PARAMS ((int regno));
extern int or1k_regnum_to_sprnum PARAMS ((int regno));
#define REGNUM_TO_SPRNUM(regno) (or1k_regnum_to_sprnum(regno))
#define REGNUM_TO_SPRNUM(regno) (or1k_regnum_to_sprnum(regno))
 
 
/* Defines for SPR bits.  */
/* Defines for SPR bits.  */
#define DMR1_ST    (0x00400000)
#define DMR1_ST    (0x00400000)
 
 
/* Changed by CZ 21/06/01 */
/* Changed by CZ 21/06/01 */
#define DRR_BE2    (0x00002000)
#define DRR_TE     (0x00002000)
#define DRR_BE     (0x00001000)
#define DRR_BE     (0x00001000)
#define DRR_SCE    (0x00000800)
#define DRR_SCE    (0x00000800)
#define DRR_RE     (0x00000400)
#define DRR_RE     (0x00000400)
#define DRR_IME    (0x00000200)
#define DRR_IME    (0x00000200)
#define DRR_DME    (0x00000100)
#define DRR_DME    (0x00000100)
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/* Number of machine VF registers */
/* Number of machine VF registers */
#define NUM_VF_REGS (or1k_implementation.num_vfpr_regs)
#define NUM_VF_REGS (or1k_implementation.num_vfpr_regs)
#define MAX_VF_REGS (32)
#define MAX_VF_REGS (32)
 
 
/*******************************/
 
/* Paramterized by CZ 11/09/01 */
 
/*******************************/
 
/* gdb mapping of registers */
/* gdb mapping of registers */
#ifndef NUM_REGS
#ifndef NUM_REGS
#define NUM_REGS (MAX_GPR_REGS+MAX_VF_REGS+MAX_EXTRA_NUM_REGS)  
#define NUM_REGS (MAX_GPR_REGS+MAX_VF_REGS+3)
#endif
#endif
 
 
/* Can act like a little or big endian.  */
/* Can act like a little or big endian.  */
#if !defined (TARGET_BYTE_ORDER_DEFAULT)
#if !defined (TARGET_BYTE_ORDER_DEFAULT)
#define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN
#define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN
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/* Amount PC must be decremented by after a breakpoint.
/* Amount PC must be decremented by after a breakpoint.
   This is often the number of bytes in BREAKPOINT
   This is often the number of bytes in BREAKPOINT
   but not always.  */
   but not always.  */
 
 
/* Note: several attempts have been made to account for
 
   differences between hardware and software breakpoints
 
   and still allow hardware breakpoints to advance the
 
   PC beyond the offending instruction.  However, short
 
   of rewriting gdb, none of them seem to work. Thus,
 
   for now, we assume that a hardware breakpoint will
 
   always give control to the breakpoint vector BEFORE
 
   it executes the instruction, thus, when the breakpoint
 
   vector returns, it will return to the same instruction
 
   that caused the exception (and thus hit the exception
 
   again if it hasn't been cleared) Note that if it actually
 
   executes this instruction, things fail bandly inside of
 
   gdb. This should not be an issue for now, as the or1200
 
   implementation will not implement hardware breakpoints
 
   at all.. */
 
 
 
#define DECR_PC_AFTER_BREAK 0
#define DECR_PC_AFTER_BREAK 0
 
 
extern int or1k_insert_breakpoint (CORE_ADDR addr, char *contents_cache);
extern int or1k_insert_breakpoint (CORE_ADDR addr, char *contents_cache);
#define target_insert_hw_breakpoint(addr, cache) or1k_insert_breakpoint (addr, cache)
#define target_insert_hw_breakpoint(addr, cache) or1k_insert_breakpoint (addr, cache)
 
 

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