| Line 38... |
Line 38... |
|
|
/* *INDENT-OFF* */
|
/* *INDENT-OFF* */
|
|
|
/* Group reg name size. See or1k_reg_names. */
|
/* Group reg name size. See or1k_reg_names. */
|
int or1k_group_name_sizes[OR1K_NUM_SPR_GROUPS] = {
|
int or1k_group_name_sizes[OR1K_NUM_SPR_GROUPS] = {
|
64, 0, 0, 0, 0, 0, (24+32+32), 0, 0, 0 };
|
64, 0, 0, 6, 6, 2, (24+32+32), 16, 1, 3, 2};
|
|
|
/* Generated reg names. See or1k_internal_reg_name. */
|
/* Generated reg names. See or1k_spr_reg_name. */
|
int or1k_spr_valid_aliases[OR1K_NUM_SPR_GROUPS] = {
|
int or1k_spr_valid_aliases[OR1K_NUM_SPR_GROUPS] = {
|
64, 515, 0, 0, 0, 0, (24+32+32), 0, 0, 0 };
|
64, 515, 515, 6, 6, 2, (24+32+32), 16, 1, 3, 2};
|
|
|
/* Register names. */
|
/* Register names. */
|
char *or1k_reg_names[] = {
|
char *or1k_reg_names[] = {
|
/* group 0 - general*/
|
/* group 0 - general*/
|
"?", "VR", "UPR", "SR", "EPCR0", "?", "?", "?",
|
"UPR", "VR", "PC", "SR", "EPCR0", "SPR0_5", "SPR0_6", "SPR0_7",
|
"?", "?", "?", "?", "?", "?", "?", "?",
|
"SPR0_8", "SPR0_9", "SPR0_10", "SPR0_11", "SPR0_12", "SPR0_13", "SPR0_14", "SPR0_15",
|
"EPCR0", "EPCR1", "EPCR2", "EPCR3", "EPCR4", "EPCR5", "EPCR6", "EPCR7",
|
"EPCR0", "EPCR1", "EPCR2", "EPCR3", "EPCR4", "EPCR5", "EPCR6", "EPCR7",
|
"EPCR8", "EPCR9", "EPCR10", "EPCR11", "EPCR12", "EPCR13", "EPCR14", "EPCR15",
|
"EPCR8", "EPCR9", "EPCR10", "EPCR11", "EPCR12", "EPCR13", "EPCR14", "EPCR15",
|
"EEAR0","EEAR1", "EEAR2", "EEAR3", "EEAR4", "EEAR5", "EEAR6", "EEAR7",
|
"EEAR0","EEAR1", "EEAR2", "EEAR3", "EEAR4", "EEAR5", "EEAR6", "EEAR7",
|
"EEAR8", "EEAR9", "EEAR10", "EEAR11", "EEAR12", "EEAR13", "EEAR14", "EEAR15",
|
"EEAR8", "EEAR9", "EEAR10", "EEAR11", "EEAR12", "EEAR13", "EEAR14", "EEAR15",
|
"ESR0", "ESR1", "ESR2", "ESR3", "ESR4", "ESR5", "ESR6", "ESR7",
|
"ESR0", "ESR1", "ESR2", "ESR3", "ESR4", "ESR5", "ESR6", "ESR7",
|
"ESR8", "ESR9", "ESR10", "ESR11", "ESR12", "ESR13", "ESR14", "ESR15",
|
"ESR8", "ESR9", "ESR10", "ESR11", "ESR12", "ESR13", "ESR14", "ESR15",
|
|
/* gpr+vf registers generated */
|
/* group 1 - Data MMU - not listed, generated */
|
/* group 1 - Data MMU - not listed, generated */
|
|
/* group 2 - Instruction MMU - not listed, generated */
|
|
/* group 3 - Data cache */
|
|
"DCCR", "DCBPR", "DCBFR", "DCBIR", "DCBWR", "DCBLR",
|
|
/* group 4 - Instruction cache */
|
|
"ICCR", "ICBPR", "ICBFR", "ICBIR", "ICBWR", "ICBLR",
|
|
/* group 5 - MAC */
|
|
"MACLO", "MACHI",
|
/* group 6 - debug */
|
/* group 6 - debug */
|
"DVR0", "DVR1", "DVR2", "DVR3", "DVR4", "DVR5", "DVR6", "DVR7",
|
"DVR0", "DVR1", "DVR2", "DVR3", "DVR4", "DVR5", "DVR6", "DVR7",
|
"DCR0", "DCR1", "DCR2", "DCR3", "DCR4", "DCR5", "DCR6", "DCR7",
|
"DCR0", "DCR1", "DCR2", "DCR3", "DCR4", "DCR5", "DCR6", "DCR7",
|
"DMR1", "DMR2", "DCWR0", "DCWR1", "DSR", "DRR", "PC", "?",
|
"DMR1", "DMR2", "DCWR0","DCWR1", "DSR", "DRR", "PC", "SPR6_23",
|
|
|
|
/* group 7 - performance counters unit */
|
|
"PCCR0", "PCCR1", "PCCR2", "PCCR3", "PCCR4", "PCCR5", "PCCR6", "PCCR7",
|
|
"PCCM0", "PCMR1", "PCMR2", "PCMR3", "PCMR4", "PCMR5", "PCMR6", "PCMR7",
|
|
|
|
/* group 8 - power management */
|
|
"PMR",
|
|
|
|
/* group 9 - PIC */
|
|
"PICMR", "PICPR",
|
|
|
|
/* group 10 - tick timer */
|
|
"TTCR", "TTIR"
|
|
};
|
|
|
|
static char *or1k_gdb_reg_names[] = {
|
/* general purpose registers */
|
/* general purpose registers */
|
"ZERO", "SP", "FP", "A0", "A1", "A2", "A3", "A4",
|
"ZERO", "SP", "FP", "A0", "A1", "A2", "A3", "A4",
|
"A5", "LR", "R10", "RV", "R12", "R13", "R14", "R15",
|
"A5", "LR", "R10", "RV", "R12", "R13", "R14", "R15",
|
"R16", "R17", "R18", "R19", "R20", "R21", "R22", "R23",
|
"R16", "R17", "R18", "R19", "R20", "R21", "R22", "R23",
|
"R24", "R25", "R26", "R27", "R28", "R29", "R30", "R31",
|
"R24", "R25", "R26", "R27", "R28", "R29", "R30", "R31",
|
/* vector/floating point registers */
|
/* vector/floating point registers */
|
"VFA0", "VFA1", "VFA2", "VFA3", "VFA4", "VFA5", "VFRV ", "VFR7",
|
"VFA0", "VFA1", "VFA2", "VFA3", "VFA4", "VFA5", "VFRV ", "VFR7",
|
"VFR8", "VFR9", "VFR10", "VFR11", "VFR12", "VFR13", "VFR14", "VFR15",
|
"VFR8", "VFR9", "VFR10", "VFR11", "VFR12", "VFR13", "VFR14", "VFR15",
|
"VFR16", "VFR17", "VFR18", "VFR19", "VFR20", "VFR21", "VFR22", "VFR23",
|
"VFR16", "VFR17", "VFR18", "VFR19", "VFR20", "VFR21", "VFR22", "VFR23",
|
"VFR24", "VFR25", "VFR26", "VFR27", "VFR28", "VFR29", "VFR30", "VFR31"
|
"VFR24", "VFR25", "VFR26", "VFR27", "VFR28", "VFR29", "VFR30", "VFR31",
|
|
"PC", "SR", "EPCR"
|
};
|
};
|
|
|
static char *or1k_group_names[] = {
|
static char *or1k_group_names[] = {
|
"SYS", "DMMU", "IMMU", "DCACHE", "ICACHE", "MAC", "DEBUG", "PERF", "POWER",
|
"SYS", "DMMU", "IMMU", "DCACHE", "ICACHE", "MAC", "DEBUG", "PERF", "POWER",
|
"PIC", "TIMER"
|
"PIC", "TIMER"
|
};
|
};
|
|
/* Table of or1k signals. */
|
|
static struct {
|
|
char *name;
|
|
char *string;
|
|
} or1k_signals [NUM_OR1K_SIGNALS + 1] =
|
|
{
|
|
{"RSTE", "Reset Exception"},
|
|
{"DFPE", "Data Page Fault Exception"},
|
|
{"IFPE", "Instruction Page Fault Exception"},
|
|
{"LPINTE", "Low Priority Interrupt Exception"},
|
|
{"AE", "Alignment Exception"},
|
|
{"HPINTE", "High Priority Interrupt Exception"},
|
|
{"DME", "DTLB Miss Exception"},
|
|
{"IME", "ITLB Miss Exception"},
|
|
{"RE", "Range Exception"},
|
|
{"SCE", "SCE Exception"}, //!!!
|
|
{NULL, NULL}
|
|
};
|
|
|
/* *INDENT-ON* */
|
/* *INDENT-ON* */
|
|
|
/* The list of available "set or1k " and "show or1k " commands */
|
/* The list of available "set or1k " and "show or1k " commands */
|
static struct cmd_list_element *setor1kcmdlist = NULL;
|
static struct cmd_list_element *setor1kcmdlist = NULL;
|
static struct cmd_list_element *showor1kcmdlist = NULL;
|
static struct cmd_list_element *showor1kcmdlist = NULL;
|
| Line 93... |
Line 136... |
/* Converts regno to sprno. or1k debug unit has GPRs mapped to SPRs,
|
/* Converts regno to sprno. or1k debug unit has GPRs mapped to SPRs,
|
which are not compact, so we are mapping them for GDB. */
|
which are not compact, so we are mapping them for GDB. */
|
int
|
int
|
or1k_regnum_to_sprnum (int regno)
|
or1k_regnum_to_sprnum (int regno)
|
{
|
{
|
|
if (regno < MAX_GPR_REGS)
|
|
return SPR_REG(SPR_SYSTEM_GROUP, regno + CURRENT_CID * MAX_GPR_REGS + SPR_GPR);
|
if (regno < MAX_GPR_REGS + MAX_VF_REGS)
|
if (regno < MAX_GPR_REGS + MAX_VF_REGS)
|
return SPR_REG(SPR_DEBUG_GROUP, regno + SPR_GPR);
|
return SPR_REG(SPR_SYSTEM_GROUP, regno - MAX_GPR_REGS
|
if (regno == PC_REGNUM)
|
+ CURRENT_CID * MAX_GPR_REGS + SPR_VFPR);
|
return PC_SPRNUM;
|
|
if (regno == PS_REGNUM)
|
if (regno == PS_REGNUM)
|
return SR_SPRNUM;
|
return SR_SPRNUM;
|
|
if (regno == PC_REGNUM)
|
|
return PC_SPRNUM;
|
if (regno == CCR_REGNUM)
|
if (regno == CCR_REGNUM)
|
return CCR_SPRNUM(0);
|
return CCR_SPRNUM(CURRENT_CID);
|
error ("Invalid register number!");
|
error ("Invalid register number!");
|
}
|
}
|
|
|
/* Builds and returns register name. */
|
/* Builds and returns register name. */
|
|
|
static char tmp_name[16];
|
static char tmp_name[16];
|
static char *
|
static char *
|
or1k_internal_register_name (i)
|
or1k_spr_register_name (i)
|
int i;
|
int i;
|
{
|
{
|
int group = i >> SPR_GROUP_SIZE_BITS;
|
int group = i >> SPR_GROUP_SIZE_BITS;
|
int index = i & (SPR_GROUP_SIZE - 1);
|
int index = i & (SPR_GROUP_SIZE - 1);
|
switch (group)
|
switch (group)
|
{
|
{
|
/* Names covered in or1k_reg_names. */
|
/* Names covered in or1k_reg_names. */
|
case 0:
|
case 0:
|
|
case 3:
|
|
case 4:
|
|
case 5:
|
case 6:
|
case 6:
|
|
case 7:
|
|
case 8:
|
|
case 9:
|
|
case 10:
|
{
|
{
|
int group_start = 0;
|
int group_start = 0;
|
for (i = 0; i < group; i++)
|
for (i = 0; i < group; i++)
|
group_start += or1k_group_name_sizes[i];
|
group_start += or1k_group_name_sizes[i];
|
|
|
| Line 131... |
Line 184... |
return (char *)&tmp_name;
|
return (char *)&tmp_name;
|
}
|
}
|
else
|
else
|
return or1k_reg_names[group_start + index];
|
return or1k_reg_names[group_start + index];
|
}
|
}
|
/* Build names for MMU group. */
|
/* Build names for DMMU group. */
|
case 1:
|
case 1:
|
if (index < 256) {
|
if (index < 256) {
|
sprintf (tmp_name, "DTLBMR%i", index);
|
sprintf (tmp_name, "DTLBMR%i", index);
|
return (char *)&tmp_name;
|
return (char *)&tmp_name;
|
}
|
}
|
| Line 155... |
Line 208... |
return "DTLBEIR";
|
return "DTLBEIR";
|
default:
|
default:
|
sprintf (tmp_name, "SPR1_%i", index+512);
|
sprintf (tmp_name, "SPR1_%i", index+512);
|
return (char *)&tmp_name;
|
return (char *)&tmp_name;
|
}
|
}
|
|
/* Build names for IMMU group. */
|
|
case 2:
|
|
if (index < 256) {
|
|
sprintf (tmp_name, "ITLBMR%i", index);
|
|
return (char *)&tmp_name;
|
|
}
|
|
index -= 256;
|
|
if (index < 256) {
|
|
sprintf (tmp_name, "ITLBTR%i", index);
|
|
return (char *)&tmp_name;
|
|
}
|
|
index -= 256;
|
|
switch (index)
|
|
{
|
|
case 0:
|
|
return "IMMUCR";
|
|
case 1:
|
|
return "IMMUPR";
|
|
case 2:
|
|
return "ITLBEIR";
|
|
default:
|
|
sprintf (tmp_name, "SPR1_%i", index+512);
|
|
return (char *)&tmp_name;
|
|
}
|
default:
|
default:
|
sprintf (tmp_name, "SPR%i_%i", group, index);
|
sprintf (tmp_name, "SPR%i_%i", group, index);
|
return (char *)&tmp_name;
|
return (char *)&tmp_name;
|
}
|
}
|
}
|
}
|
| Line 185... |
Line 262... |
else return i;
|
else return i;
|
}
|
}
|
for (i = 0; i < or1k_spr_valid_aliases[group]; i++)
|
for (i = 0; i < or1k_spr_valid_aliases[group]; i++)
|
{
|
{
|
char *s;
|
char *s;
|
s = or1k_internal_register_name (SPR_REG(group, i));
|
s = or1k_spr_register_name (SPR_REG(group, i));
|
if (strcasecmp (name, s) == 0)
|
if (strcasecmp (name, s) == 0)
|
return i;
|
return i;
|
}
|
}
|
return -1;
|
return -1;
|
}
|
}
|
|
|
#define OR1K_BREAKPOINT_STRUCT {0x21, 0x00, 0x00, 0x00}
|
|
|
|
/* Resturs gdb register name. */
|
/* Resturs gdb register name. */
|
char *
|
char *
|
or1k_register_name (regno)
|
or1k_register_name (regno)
|
int regno;
|
int regno;
|
{
|
{
|
return or1k_internal_register_name (REGNUM_TO_SPRNUM(regno));
|
return or1k_gdb_reg_names[regno];
|
|
}
|
|
|
|
static int
|
|
do_vf_register (regnum)
|
|
int regnum;
|
|
{ /* do values for FP (float) regs */
|
|
char *raw_buffer;
|
|
double doub, flt; /* doubles extracted from raw hex data */
|
|
int inv1, inv3, byte;
|
|
|
|
raw_buffer = (char *) alloca (OR1K_VF_REGSIZE);
|
|
|
|
/* Get the data in raw format. */
|
|
if (read_relative_register_raw_bytes (regnum, raw_buffer))
|
|
error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
|
|
|
|
flt = unpack_double (builtin_type_float, raw_buffer, &inv1);
|
|
doub = unpack_double (builtin_type_double, raw_buffer, &inv3);
|
|
|
|
printf_filtered (inv1 ? " %-5s flt: <invalid float>" :
|
|
" %-5s flt:%-17.9g", REGISTER_NAME (regnum), flt);
|
|
printf_filtered (inv3 ? " dbl: <invalid double> " :
|
|
" dbl: %-24.17g ", doub);
|
|
|
|
/* pad small registers */
|
|
for (byte = 0; byte < (OR1K_GPR_REGSIZE - REGISTER_VIRTUAL_SIZE (regnum)); byte++)
|
|
printf_filtered (" ");
|
|
/* Now print the register value in hex, endian order. */
|
|
if (TARGET_BYTE_ORDER == BIG_ENDIAN)
|
|
for (byte = REGISTER_RAW_SIZE (regnum) - REGISTER_VIRTUAL_SIZE (regnum);
|
|
byte < REGISTER_RAW_SIZE (regnum);
|
|
byte++)
|
|
printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
|
|
else
|
|
for (byte = REGISTER_VIRTUAL_SIZE (regnum) - 1;
|
|
byte >= 0;
|
|
byte--)
|
|
printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
|
|
printf_filtered ("\n");
|
|
|
|
regnum++;
|
|
return regnum;
|
|
}
|
|
|
|
/* Print a row's worth of GP (int) registers, with name labels above */
|
|
|
|
static int
|
|
do_gp_register_row (regnum)
|
|
int regnum;
|
|
{
|
|
/* do values for GP (int) regs */
|
|
char raw_buffer[MAX_REGISTER_RAW_SIZE];
|
|
int ncols = (OR1K_64BIT_IMPLEMENTATION ? 4 : 8); /* display cols per row */
|
|
int col, byte;
|
|
int start_regnum = regnum;
|
|
int numregs = NUM_REGS;
|
|
|
|
|
|
/* For GP registers, we print a separate row of names above the vals */
|
|
printf_filtered (" ");
|
|
for (col = 0; col < ncols && regnum < numregs; regnum++)
|
|
{
|
|
if (*REGISTER_NAME (regnum) == '\0')
|
|
continue; /* unused register */
|
|
if (OR1K_IS_VF(regnum))
|
|
break; /* end the row: reached VF register */
|
|
printf_filtered (OR1K_64BIT_IMPLEMENTATION ? "%17s" : "%9s",
|
|
REGISTER_NAME (regnum));
|
|
col++;
|
|
}
|
|
printf_filtered ("\n ");
|
|
|
|
regnum = start_regnum; /* go back to start of row */
|
|
|
|
/* now print the values in hex, 4 or 8 to the row */
|
|
for (col = 0; col < ncols && regnum < numregs; regnum++)
|
|
{
|
|
if (*REGISTER_NAME (regnum) == '\0')
|
|
continue; /* unused register */
|
|
if (OR1K_IS_VF(regnum))
|
|
break; /* end row: reached VF register */
|
|
/* OK: get the data in raw format. */
|
|
if (read_relative_register_raw_bytes (regnum, raw_buffer))
|
|
error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
|
|
/* pad small registers */
|
|
for (byte = 0; byte < (OR1K_GPR_REGSIZE - REGISTER_VIRTUAL_SIZE (regnum)); byte++)
|
|
printf_filtered (" ");
|
|
/* Now print the register value in hex, endian order. */
|
|
if (TARGET_BYTE_ORDER == BIG_ENDIAN)
|
|
for (byte = REGISTER_RAW_SIZE (regnum) - REGISTER_VIRTUAL_SIZE (regnum);
|
|
byte < REGISTER_RAW_SIZE (regnum);
|
|
byte++)
|
|
printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
|
|
else
|
|
for (byte = REGISTER_VIRTUAL_SIZE (regnum) - 1;
|
|
byte >= 0;
|
|
byte--)
|
|
printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
|
|
printf_filtered (" ");
|
|
col++;
|
|
}
|
|
if (col > 0) /* ie. if we actually printed anything... */
|
|
printf_filtered ("\n");
|
|
|
|
return regnum;
|
|
}
|
|
|
|
/* Replacement for generic do_registers_info.
|
|
Print regs in pretty columns. */
|
|
static void
|
|
print_register (regnum, all)
|
|
int regnum, all;
|
|
{
|
|
int offset;
|
|
char raw_buffer[MAX_REGISTER_RAW_SIZE];
|
|
|
|
/* Get the data in raw format. */
|
|
if (read_relative_register_raw_bytes (regnum, raw_buffer))
|
|
{
|
|
printf_filtered ("%s: [Invalid]", REGISTER_NAME (regnum));
|
|
return;
|
|
}
|
|
|
|
/* If virtual format is floating, print it that way. */
|
|
if (OR1K_IS_VF (regnum))
|
|
do_vf_register (regnum);
|
|
else
|
|
{
|
|
int byte;
|
|
printf_filtered ("%-16s\t", REGISTER_NAME (regnum));
|
|
|
|
/* pad small registers */
|
|
for (byte = 0; byte < (OR1K_GPR_REGSIZE - REGISTER_VIRTUAL_SIZE (regnum)); byte++)
|
|
printf_filtered (" ");
|
|
/* Now print the register value in hex, endian order. */
|
|
if (TARGET_BYTE_ORDER == BIG_ENDIAN)
|
|
for (byte = REGISTER_RAW_SIZE (regnum) - REGISTER_VIRTUAL_SIZE (regnum);
|
|
byte < REGISTER_RAW_SIZE (regnum);
|
|
byte++)
|
|
printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
|
|
else
|
|
for (byte = REGISTER_VIRTUAL_SIZE (regnum) - 1;
|
|
byte >= 0;
|
|
byte--)
|
|
printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
|
|
printf_filtered (" ");
|
|
}
|
|
}
|
|
|
|
/* DO_REGISTERS_INFO: called by "info register" command */
|
|
|
|
void
|
|
or1k_do_registers_info (regnum, fpregs)
|
|
int regnum;
|
|
int fpregs;
|
|
{
|
|
if (fpregs && !or1k_implementation.vf_present)
|
|
{
|
|
warning ("VF register set not present in this implementation.");
|
|
fpregs = 0;
|
|
}
|
|
if (regnum != -1) /* do one specified register */
|
|
{
|
|
if (*(REGISTER_NAME (regnum)) == '\0')
|
|
error ("Not a valid register for the current processor type");
|
|
|
|
print_register (regnum, 0);
|
|
printf_filtered ("\n");
|
|
}
|
|
else
|
|
/* do all (or most) registers */
|
|
{
|
|
regnum = 0;
|
|
while (regnum < NUM_REGS)
|
|
{
|
|
if (OR1K_IS_VF (regnum))
|
|
if (fpregs) /* true for "INFO ALL-REGISTERS" command */
|
|
regnum = do_vf_register (regnum); /* FP regs */
|
|
else
|
|
regnum++; /* skip floating point regs */
|
|
else
|
|
regnum = do_gp_register_row (regnum); /* GP (int) regs */
|
|
}
|
|
}
|
}
|
}
|
|
|
/* Given the address at which to insert a breakpoint (BP_ADDR),
|
/* Given the address at which to insert a breakpoint (BP_ADDR),
|
what will that breakpoint be?
|
what will that breakpoint be?
|
|
|
| Line 214... |
Line 473... |
unsigned char *
|
unsigned char *
|
or1k_breakpoint_from_pc (bp_addr, bp_size)
|
or1k_breakpoint_from_pc (bp_addr, bp_size)
|
CORE_ADDR * bp_addr;
|
CORE_ADDR * bp_addr;
|
int *bp_size;
|
int *bp_size;
|
{
|
{
|
static char breakpoint[] = OR1K_BREAKPOINT_STRUCT;
|
static char breakpoint[] = BRK_INSTR_STRUCT;
|
*bp_size = OR1K_INSTLEN;
|
*bp_size = OR1K_INSTLEN;
|
return breakpoint;
|
return breakpoint;
|
}
|
}
|
|
|
|
/* Return the string for a signal. Replacement for target_signal_to_string (sig). */
|
|
char
|
|
*or1k_signal_to_string (sig)
|
|
enum target_signal sig;
|
|
{
|
|
if ((sig >= TARGET_SIGNAL_FIRST) && (sig <= TARGET_SIGNAL_LAST))
|
|
return or1k_signals[sig].string;
|
|
else
|
|
if (sig <= TARGET_SIGNAL_LAST + NUM_OR1K_SIGNALS)
|
|
return or1k_signals[sig - TARGET_SIGNAL_LAST].string;
|
|
else
|
|
return 0/* signals[TARGET_SIGNAL_UNKNOWN].string*/;
|
|
}
|
|
|
|
/* Return the name for a signal. */
|
|
char *
|
|
or1k_signal_to_name (sig)
|
|
enum target_signal sig;
|
|
{
|
|
if (sig >= TARGET_SIGNAL_LAST)
|
|
if (sig <= TARGET_SIGNAL_LAST + NUM_OR1K_SIGNALS)
|
|
return or1k_signals[sig - TARGET_SIGNAL_LAST].name;
|
|
else
|
|
/* I think the code which prints this will always print it along with
|
|
the string, so no need to be verbose. */
|
|
return "?";
|
|
if (sig == TARGET_SIGNAL_UNKNOWN)
|
|
return "?";
|
|
return 0/*!!!signals[sig].name*/;
|
|
}
|
|
|
|
/* Given a name, return its signal. */
|
|
enum target_signal
|
|
or1k_signal_from_name (name)
|
|
char *name;
|
|
{
|
|
enum target_signal sig;
|
|
|
|
/* It's possible we also should allow "SIGCLD" as well as "SIGCHLD"
|
|
for TARGET_SIGNAL_SIGCHLD. SIGIOT, on the other hand, is more
|
|
questionable; seems like by now people should call it SIGABRT
|
|
instead. */
|
|
|
|
/* This ugly cast brought to you by the native VAX compiler. */
|
|
for (sig = TARGET_SIGNAL_FIRST;
|
|
or1k_signal_to_name (sig) != NULL;
|
|
sig = (enum target_signal) ((int) sig + 1))
|
|
if (STREQ (name, or1k_signal_to_name (sig)))
|
|
return sig;
|
|
return TARGET_SIGNAL_UNKNOWN;
|
|
}
|
|
|
/* Given a return value in `regbuf' with a type `valtype', extract and
|
/* Given a return value in `regbuf' with a type `valtype', extract and
|
copy its value into `valbuf'. */
|
copy its value into `valbuf'. */
|
void
|
void
|
or1k_extract_return_value (valtype, regbuf, valbuf)
|
or1k_extract_return_value (valtype, regbuf, valbuf)
|
struct type *valtype;
|
struct type *valtype;
|
| Line 632... |
Line 943... |
*index = or1k_regno_from_name (*group, args);
|
*index = or1k_regno_from_name (*group, args);
|
|
|
if (*index < 0)
|
if (*index < 0)
|
{
|
{
|
for (i = 0; i < or1k_spr_valid_aliases[*group]; i++)
|
for (i = 0; i < or1k_spr_valid_aliases[*group]; i++)
|
printf_unfiltered ("%s\t", or1k_internal_register_name (SPR_REG(*group, i)));
|
printf_unfiltered ("%s\t", or1k_spr_register_name (SPR_REG(*group, i)));
|
printf_unfiltered ("\n");
|
printf_unfiltered ("\n");
|
return args + strlen(args) + 1;
|
return args + strlen(args) + 1;
|
}
|
}
|
}
|
}
|
}
|
}
|
| Line 653... |
Line 964... |
}
|
}
|
|
|
/* SPR register info. */
|
/* SPR register info. */
|
|
|
void
|
void
|
info_spr_cmd (char *args, int from_tty)
|
info_spr_command (char *args, int from_tty)
|
{
|
{
|
int group, index;
|
int group, index;
|
parse_spr_params (args, &group, &index);
|
parse_spr_params (args, &group, &index);
|
if (index >= 0)
|
if (index >= 0)
|
{
|
{
|
printf_unfiltered ("%s.%s (SPR%i_%i) set to %i(%X), was:%i(%X)\n", or1k_group_names[group],
|
printf_unfiltered ("%s.%s (SPR%i_%i) set to %i(%X), was:%i(%X)\n", or1k_group_names[group],
|
or1k_internal_register_name (SPR_REG(group, index)), group, index,
|
or1k_spr_register_name (SPR_REG(group, index)), group, index,
|
or1k_read_reg (SPR_REG(group, index)));
|
or1k_read_spr_reg (SPR_REG(group, index)));
|
}
|
}
|
}
|
}
|
|
|
/* Set SPR register. */
|
/* Set SPR register. */
|
|
|
void
|
void
|
spr_cmd (char *args, int from_tty)
|
spr_command (char *args, int from_tty)
|
{
|
{
|
int group, index;
|
int group, index;
|
char *nargs = parse_spr_params (args, &group, &index);
|
char *nargs = parse_spr_params (args, &group, &index);
|
/* Any arguments left? */
|
/* Any arguments left? */
|
if (args + strlen(args) >= nargs)
|
if (args + strlen(args) >= nargs)
|
| Line 681... |
Line 992... |
{
|
{
|
unsigned long prev;
|
unsigned long prev;
|
unsigned long value;
|
unsigned long value;
|
char *ptr_c;
|
char *ptr_c;
|
|
|
prev = or1k_read_reg (SPR_REG(group, index));
|
prev = or1k_read_spr_reg (SPR_REG(group, index));
|
|
|
ptr_c = nargs;
|
ptr_c = nargs;
|
while (*ptr_c != ' ' && *ptr_c != 0)
|
while (*ptr_c != ' ' && *ptr_c != 0)
|
ptr_c++;
|
ptr_c++;
|
*ptr_c = 0;
|
*ptr_c = 0;
|
value = strtoul (nargs, &ptr_c, 0);
|
value = strtoul (nargs, &ptr_c, 0);
|
if (*ptr_c != 0)
|
if (*ptr_c != 0)
|
error ("Invalid register value.");
|
error ("Invalid register value.");
|
printf_unfiltered ("%s.%s (SPR%i_%i) set to %i(%X), was:%i(%X)\n", or1k_group_names[group],
|
printf_unfiltered ("%s.%s (SPR%i_%i) set to %i(%X), was:%i(%X)\n", or1k_group_names[group],
|
or1k_internal_register_name (SPR_REG(group, index)), group, index,
|
or1k_spr_register_name (SPR_REG(group, index)), group, index,
|
value, value, prev, prev);
|
value, value, prev, prev);
|
}
|
}
|
}
|
}
|
|
|
/* Calls extended command on target. */
|
/* Calls extended command on target. */
|
| Line 704... |
Line 1015... |
sim_command (char *args, int from_tty)
|
sim_command (char *args, int from_tty)
|
{
|
{
|
or1k_sim_cmd (args, from_tty);
|
or1k_sim_cmd (args, from_tty);
|
}
|
}
|
|
|
|
/* ARGSUSED */
|
|
/* accessflag: hw_write: watch write,
|
|
hw_read: watch read,
|
|
hw_access: watch access (read or write) */
|
|
static void
|
|
hwatch_command (arg, from_tty)
|
|
char *arg;
|
|
int from_tty;
|
|
{
|
|
struct expression *exp;
|
|
int i;
|
|
int nfree;
|
|
/* Parse arguments. */
|
|
exp = parse_exp_1 (&arg, 0, 0);
|
|
|
|
dump_prefix_expression (exp, gdb_stdout, "expr1");
|
|
|
|
/* Now we have to find out if given prefix expression matches
|
|
our HW based support. It may take up to
|
|
or1k_implementation.num_matchpoints - or1k_implementation.num_used_matchpoints. */
|
|
nfree = or1k_implementation.num_matchpoints - or1k_implementation.num_used_matchpoints;
|
|
//printf_unfiltered ("%s\n", exp->elts[1].internalvar->name);
|
|
free (exp);
|
|
}
|
|
|
void
|
void
|
_initialize_or1k_tdep ()
|
_initialize_or1k_tdep ()
|
{
|
{
|
struct cmd_list_element *c;
|
struct cmd_list_element *c;
|
/* Add root prefix command for all "set or1k"/"show or1k" commands */
|
/* Add root prefix command for all "set or1k"/"show or1k" commands */
|
| Line 718... |
Line 1054... |
add_prefix_cmd ("or1k", no_class, show_or1k_command,
|
add_prefix_cmd ("or1k", no_class, show_or1k_command,
|
"Various OR1K specific commands.",
|
"Various OR1K specific commands.",
|
&showor1kcmdlist, "show or1k ", 0, &showlist);
|
&showor1kcmdlist, "show or1k ", 0, &showlist);
|
|
|
/* Commands to show information about the sprs. */
|
/* Commands to show information about the sprs. */
|
add_cmd ("spr", class_info, info_spr_cmd,
|
add_info ("spr", info_spr_command, "Show information about the spr registers.");
|
"Show information about the spr registers.",
|
add_com ("hwatch", class_breakpoint, hwatch_command, "Set hardware watchpoint.");
|
&infolist);
|
add_com ("spr", class_support, spr_command, "Set specified SPR register.");
|
c = add_cmd ("spr", class_support, spr_cmd,
|
|
"Set specified SPR register.",
|
|
&cmdlist);
|
|
add_com ("sim", class_obscure, sim_command,
|
add_com ("sim", class_obscure, sim_command,
|
"Send a extended command to the simulator.");
|
"Send a extended command to the simulator.");
|
}
|
}
|
|
|
No newline at end of file
|
No newline at end of file
|
