| Line 45... |
Line 45... |
72, 0, 0, 6, 4, 2,
|
72, 0, 0, 6, 4, 2,
|
22, 16, 1, 3, 2, 8};
|
22, 16, 1, 3, 2, 8};
|
|
|
int or1k_group_name_start[OR1K_NUM_SPR_GROUPS] = {
|
int or1k_group_name_start[OR1K_NUM_SPR_GROUPS] = {
|
0, 0, 0, 253, 254, 256,
|
0, 0, 0, 253, 254, 256,
|
16, 248, 16, 16, 255, 0};
|
0, 248, 16, 16, 255, 0};
|
|
|
/* Generated reg names (max valid alias index).
|
/* Generated reg names (max valid alias index).
|
See or1k_spr_reg_name. */
|
See or1k_spr_reg_name. */
|
int or1k_spr_valid_aliases[OR1K_NUM_SPR_GROUPS] = {
|
int or1k_spr_valid_aliases[OR1K_NUM_SPR_GROUPS] = {
|
2047+1, 2047+1, 2047+1, 258+1, 257+1, 257+1,
|
2047+1, 2047+1, 2047+1, 258+1, 257+1, 257+1,
|
| Line 121... |
Line 121... |
"PC", "SR", "EPCR", "ExPC", "ExEAR", "ExSR"
|
"PC", "SR", "EPCR", "ExPC", "ExEAR", "ExSR"
|
};
|
};
|
|
|
static char *or1k_group_names[] = {
|
static char *or1k_group_names[] = {
|
"SYS", "DMMU", "IMMU", "DCACHE", "ICACHE", "MAC", "DEBUG", "PERF", "POWER",
|
"SYS", "DMMU", "IMMU", "DCACHE", "ICACHE", "MAC", "DEBUG", "PERF", "POWER",
|
"PIC", "TIMER"
|
"PIC", "TIMER", "CONFIG"
|
};
|
};
|
|
|
/* Table of or1k signals. */
|
/* Table of or1k signals. */
|
static struct
|
static struct
|
{
|
{
|
