| Line 1... |
Line 1... |
/* Table of opcodes for the OpenRISC 1000 ISA.
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/* Table of opcodes for the OpenRISC 1000 ISA.
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Copyright 2002 Free Software Foundation, Inc.
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Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
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Contributed by Damjan Lampret (lampret@opencores.org).
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Contributed by Damjan Lampret (lampret@opencores.org).
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This file is part of gen_or1k_isa, or1k, GDB and GAS.
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This file is part of gen_or1k_isa, or1ksim, GDB and GAS.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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| Line 21... |
Line 21... |
/* We treat all letters the same in encode/decode routines so
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/* We treat all letters the same in encode/decode routines so
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we need to assign some characteristics to them like signess etc. */
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we need to assign some characteristics to them like signess etc. */
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#include <string.h>
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#include <string.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include "safe-ctype.h"
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#include <ctype.h>
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#include "ansidecl.h"
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#ifdef HAVE_CONFIG_H
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#ifdef HAVE_CONFIG_H
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# include "config.h"
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# include "config.h"
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#endif
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#endif
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#include "opcode/or32.h"
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#include "opcode/or32.h"
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static unsigned long insn_extract PARAMS ((char, char *));
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/* **INDENT-OFF** */
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static unsigned long * cover_insn PARAMS ((unsigned long *, int, unsigned int));
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static int num_ones PARAMS ((unsigned long));
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static struct insn_op_struct * parse_params PARAMS ((const struct or32_opcode *, struct insn_op_struct *));
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static unsigned long or32_extract PARAMS ((char, char *, unsigned long));
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static void or32_print_register PARAMS ((char, char *, unsigned long));
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static void or32_print_immediate PARAMS ((char, char *, unsigned long));
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static unsigned long extend_imm PARAMS ((unsigned long, char));
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const struct or32_letter or32_letters[] =
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CONST struct or32_letter or32_letters[] =
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{
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{
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{ 'A', NUM_UNSIGNED },
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{ 'A', NUM_UNSIGNED },
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{ 'B', NUM_UNSIGNED },
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{ 'B', NUM_UNSIGNED },
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{ 'D', NUM_UNSIGNED },
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{ 'D', NUM_UNSIGNED },
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{ 'I', NUM_SIGNED },
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{ 'I', NUM_SIGNED },
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{ 'K', NUM_UNSIGNED },
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{ 'K', NUM_UNSIGNED },
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{ 'L', NUM_UNSIGNED },
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{ 'L', NUM_UNSIGNED },
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{ 'N', NUM_SIGNED },
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{ 'N', NUM_SIGNED },
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{ '0', NUM_UNSIGNED },
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{ '0', NUM_UNSIGNED },
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{ '\0', 0 } /* Dummy entry. */
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{ '\0', 0 } /* dummy entry */
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};
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};
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/* Opcode encoding:
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/* Opcode encoding:
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machine[31:30]: first two bits of opcode
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machine[31:30]: first two bits of opcode
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00 - neither of source operands is GPR
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00 - neither of source operands is GPR
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| Line 61... |
Line 55... |
machine[29:26]: next four bits of opcode
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machine[29:26]: next four bits of opcode
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machine[25:00]: instruction operands (specific to individual instruction)
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machine[25:00]: instruction operands (specific to individual instruction)
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Recommendation: irrelevant instruction bits should be set with a value of
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Recommendation: irrelevant instruction bits should be set with a value of
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bits in same positions of instruction preceding current instruction in the
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bits in same positions of instruction preceding current instruction in the
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code (when assembling). */
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code (when assembling).
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*/
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#if defined HAS_EXECUTION && SIMPLE_EXECUTION
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#define EFN &l_none
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#define EFN &l_none
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#ifdef HAS_EXECUTION
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#define EF(func) &(func)
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#define EF(func) &(func)
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#define EFI &l_invalid
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#define EFI &l_invalid
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#else /* HAS_EXECUTION */
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#else /* HAS_EXECUTION */
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#ifndef HAS_EXECUTION
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#define EFN &l_none
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#define EF(func) EFN
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#define EF(func) EFN
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#define EFI EFN
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#define EFI EFN
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#else /* !HAS_EXECUTION */
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#define EFN "l_none"
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#define EFI "l_invalid"
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#ifdef __GNUC__
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#define EF(func) #func
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#else
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#define EF(func) "func"
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#endif
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#endif /* !HAS_EXECUTION */
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#endif /* HAS_EXECUTION */
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#endif /* HAS_EXECUTION */
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const struct or32_opcode or32_opcodes[] =
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CONST struct or32_opcode or32_opcodes[] =
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{
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{
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{ "l.j", "N", "00 0x0 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_j), OR32_IF_DELAY },
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{ "l.j", "N", "00 0x0 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_j), OR32_IF_DELAY },
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{ "l.jal", "N", "00 0x1 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_jal), OR32_IF_DELAY },
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{ "l.jal", "N", "00 0x1 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_jal), OR32_IF_DELAY },
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{ "l.bnf", "N", "00 0x3 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bnf), OR32_IF_DELAY | OR32_R_FLAG},
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{ "l.bnf", "N", "00 0x3 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bnf), OR32_IF_DELAY | OR32_R_FLAG},
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{ "l.bf", "N", "00 0x4 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bf), OR32_IF_DELAY | OR32_R_FLAG },
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{ "l.bf", "N", "00 0x4 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bf), OR32_IF_DELAY | OR32_R_FLAG },
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{ "l.nop", "K", "00 0x5 01--- ----- KKKK KKKK KKKK KKKK", EF(l_nop), 0 },
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{ "l.nop", "K", "00 0x5 01--- ----- KKKK KKKK KKKK KKKK", EF(l_nop), 0 },
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| Line 182... |
Line 190... |
{ "lv.cust1", "", "00 0xA ----- ----- ---- ---- 0xC ----", EFI, 0 },
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{ "lv.cust1", "", "00 0xA ----- ----- ---- ---- 0xC ----", EFI, 0 },
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{ "lv.cust2", "", "00 0xA ----- ----- ---- ---- 0xD ----", EFI, 0 },
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{ "lv.cust2", "", "00 0xA ----- ----- ---- ---- 0xD ----", EFI, 0 },
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{ "lv.cust3", "", "00 0xA ----- ----- ---- ---- 0xE ----", EFI, 0 },
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{ "lv.cust3", "", "00 0xA ----- ----- ---- ---- 0xE ----", EFI, 0 },
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{ "lv.cust4", "", "00 0xA ----- ----- ---- ---- 0xF ----", EFI, 0 },
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{ "lv.cust4", "", "00 0xA ----- ----- ---- ---- 0xF ----", EFI, 0 },
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{ "lf.add.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
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{ "lf.add.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x0", EF(lf_add_s), 0 },
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{ "lf.sub.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
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{ "lf.sub.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x1", EF(lf_sub_s), 0 },
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{ "lf.mul.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 },
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{ "lf.mul.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x2", EF(lf_mul_s), 0 },
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{ "lf.div.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 },
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{ "lf.div.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x3", EF(lf_div_s), 0 },
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{ "lf.itof.s", "rD,rA", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 },
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/*{ "lf.itof.s", "rD,rA", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x4", EF(lf_itof_s), 0 },
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{ "lf.ftoi.s", "rD,rA", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 },
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{ "lf.ftoi.s", "rD,rA", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x5", EF(lf_ftoi_s), 0 },*/
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{ "lf.rem.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 },
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{ "lf.rem.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x6", EF(lf_rem_s), 0 },
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{ "lf.madd.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 },
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{ "lf.madd.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x7", EF(lf_madd_s), 0 },
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{ "lf.sfeq.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0 },
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{ "lf.sfeq.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0x8", EF(lf_sfeq_s), 0 },
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{ "lf.sfne.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0 },
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{ "lf.sfne.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0x9", EF(lf_sfne_s), 0 },
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{ "lf.sfgt.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0 },
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{ "lf.sfgt.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xA", EF(lf_sfgt_s), 0 },
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{ "lf.sfge.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0 },
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{ "lf.sfge.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xB", EF(lf_sfge_s), 0 },
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{ "lf.sflt.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0 },
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{ "lf.sflt.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xC", EF(lf_sflt_s), 0 },
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{ "lf.sfle.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0 },
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{ "lf.sfle.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xD", EF(lf_sfle_s), 0 },
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{ "lf.cust1.s", "", "00 0xB ----- ----- ---- ---- 0xE ----", EFI, 0 },
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{ "lf.cust1.s", "", "00 0xB ----- ----- ---- ---- 0xE ----", EFI, 0 },
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{ "lf.add.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
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{ "lf.add.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
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{ "lf.sub.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
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{ "lf.sub.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
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{ "lf.mul.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 },
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{ "lf.mul.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 },
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{ "lf.div.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 },
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{ "lf.div.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 },
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{ "lf.itof.d", "rD,rA", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 },
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/*{ "lf.itof.d", "rD,rA", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 },
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{ "lf.ftoi.d", "rD,rA", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 },
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{ "lf.ftoi.d", "rD,rA", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 },*/
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{ "lf.rem.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 },
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{ "lf.rem.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 },
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{ "lf.madd.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 },
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{ "lf.madd.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 },
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{ "lf.sfeq.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0 },
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{ "lf.sfeq.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0 },
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{ "lf.sfne.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0 },
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{ "lf.sfne.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0 },
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{ "lf.sfgt.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0 },
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{ "lf.sfgt.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0 },
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| Line 235... |
Line 243... |
{ "l.lbz", "rD,I(rA)", "10 0x3 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbz), 0 },
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{ "l.lbz", "rD,I(rA)", "10 0x3 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbz), 0 },
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{ "l.lbs", "rD,I(rA)", "10 0x4 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbs), 0 },
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{ "l.lbs", "rD,I(rA)", "10 0x4 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbs), 0 },
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{ "l.lhz", "rD,I(rA)", "10 0x5 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhz), 0 },
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{ "l.lhz", "rD,I(rA)", "10 0x5 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhz), 0 },
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{ "l.lhs", "rD,I(rA)", "10 0x6 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhs), 0 },
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{ "l.lhs", "rD,I(rA)", "10 0x6 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhs), 0 },
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|
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{ "l.addi", "rD,rA,I", "10 0x7 DDDDD AAAAA IIII IIII IIII IIII", EF(l_add), 0 },
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{ "l.addi", "rD,rA,I", "10 0x7 DDDDD AAAAA IIII IIII IIII IIII", EF(l_add), OR32_W_FLAG },
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{ "l.addic", "rD,rA,I", "10 0x8 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
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{ "l.addic", "rD,rA,I", "10 0x8 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
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{ "l.andi", "rD,rA,K", "10 0x9 DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_and), 0 },
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{ "l.andi", "rD,rA,K", "10 0x9 DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_and), OR32_W_FLAG },
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{ "l.ori", "rD,rA,K", "10 0xA DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_or), 0 },
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{ "l.ori", "rD,rA,K", "10 0xA DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_or), 0 },
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{ "l.xori", "rD,rA,I", "10 0xB DDDDD AAAAA IIII IIII IIII IIII", EF(l_xor), 0 },
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{ "l.xori", "rD,rA,I", "10 0xB DDDDD AAAAA IIII IIII IIII IIII", EF(l_xor), 0 },
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{ "l.muli", "rD,rA,I", "10 0xC DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
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{ "l.muli", "rD,rA,I", "10 0xC DDDDD AAAAA IIII IIII IIII IIII", EF(l_mul), 0 },
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{ "l.mfspr", "rD,rA,K", "10 0xD DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_mfspr), 0 },
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{ "l.mfspr", "rD,rA,K", "10 0xD DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_mfspr), 0 },
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{ "l.slli", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 00LL LLLL", EF(l_sll), 0 },
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{ "l.slli", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 00LL LLLL", EF(l_sll), 0 },
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{ "l.srli", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 01LL LLLL", EF(l_srl), 0 },
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{ "l.srli", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 01LL LLLL", EF(l_srl), 0 },
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{ "l.srai", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 10LL LLLL", EF(l_sra), 0 },
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{ "l.srai", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 10LL LLLL", EF(l_sra), 0 },
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{ "l.rori", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 11LL LLLL", EFI, 0 },
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{ "l.rori", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 11LL LLLL", EFI, 0 },
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| Line 267... |
Line 275... |
{ "l.sd", "I(rA),rB", "11 0x4 IIIII AAAAA BBBB BIII IIII IIII", EFI, 0 },
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{ "l.sd", "I(rA),rB", "11 0x4 IIIII AAAAA BBBB BIII IIII IIII", EFI, 0 },
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{ "l.sw", "I(rA),rB", "11 0x5 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sw), 0 },
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{ "l.sw", "I(rA),rB", "11 0x5 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sw), 0 },
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{ "l.sb", "I(rA),rB", "11 0x6 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sb), 0 },
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{ "l.sb", "I(rA),rB", "11 0x6 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sb), 0 },
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{ "l.sh", "I(rA),rB", "11 0x7 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sh), 0 },
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{ "l.sh", "I(rA),rB", "11 0x7 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sh), 0 },
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|
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{ "l.add", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), 0 },
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{ "l.add", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), OR32_W_FLAG },
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{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EFI, 0 },
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{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EFI, 0 },
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{ "l.sub", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0 },
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{ "l.sub", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0 },
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{ "l.and", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), 0 },
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{ "l.and", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), OR32_W_FLAG },
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{ "l.or", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0 },
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{ "l.or", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0 },
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{ "l.xor", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x5", EF(l_xor), 0 },
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{ "l.xor", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x5", EF(l_xor), 0 },
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{ "l.mul", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0x6", EF(l_mul), 0 },
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{ "l.mul", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0x6", EF(l_mul), 0 },
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|
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{ "l.sll", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 00-- 0x8", EF(l_sll), 0 },
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{ "l.sll", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 00-- 0x8", EF(l_sll), 0 },
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{ "l.srl", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 01-- 0x8", EF(l_srl), 0 },
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{ "l.srl", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 01-- 0x8", EF(l_srl), 0 },
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{ "l.sra", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 10-- 0x8", EF(l_sra), 0 },
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{ "l.sra", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 10-- 0x8", EF(l_sra), 0 },
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{ "l.ror", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 11-- 0x8", EFI, 0 },
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{ "l.ror", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 11-- 0x8", EFI, 0 },
|
{ "l.div", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x9", EF(l_div), 0 },
|
{ "l.div", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0x9", EF(l_div), 0 },
|
{ "l.divu", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xA", EF(l_divu), 0 },
|
{ "l.divu", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0xA", EF(l_divu), 0 },
|
{ "l.mulu", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0xB", EFI, 0 },
|
{ "l.mulu", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0xB", EFI, 0 },
|
{ "l.exths", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 00-- 0xC", EFI, 0 },
|
{ "l.extbs", "rD,rA,rB", "11 0x8 DDDDD AAAAA ---- --00 01-- 0xC", EF(l_extbs), 0 },
|
{ "l.extbs", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 01-- 0xC", EFI, 0 },
|
{ "l.exths", "rD,rA,rB", "11 0x8 DDDDD AAAAA ---- --00 00-- 0xC", EF(l_exths), 0 },
|
{ "l.exthz", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 10-- 0xC", EFI, 0 },
|
{ "l.extws", "rD,rA,rB", "11 0x8 DDDDD AAAAA ---- --00 00-- 0xD", EF(l_extws), 0 },
|
{ "l.extbz", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 11-- 0xC", EFI, 0 },
|
{ "l.extbz", "rD,rA,rB", "11 0x8 DDDDD AAAAA ---- --00 11-- 0xC", EF(l_extbz), 0 },
|
{ "l.extws", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 00-- 0xD", EFI, 0 },
|
{ "l.exthz", "rD,rA,rB", "11 0x8 DDDDD AAAAA ---- --00 10-- 0xC", EF(l_exthz), 0 },
|
{ "l.extwz", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 01-- 0xD", EFI, 0 },
|
{ "l.extwz", "rD,rA,rB", "11 0x8 DDDDD AAAAA ---- --00 01-- 0xD", EF(l_extwz), 0 },
|
{ "l.cmov", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xE", EFI, 0 },
|
{ "l.cmov", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xE", EF(l_cmov), OR32_R_FLAG },
|
{ "l.ff1", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xF", EFI, 0 },
|
{ "l.ff1", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xF", EFI, 0 },
|
|
|
{ "l.sfeq", "rA,rB", "11 0x9 00000 AAAAA BBBB B--- ---- ----", EF(l_sfeq), OR32_W_FLAG },
|
{ "l.sfeq", "rA,rB", "11 0x9 00000 AAAAA BBBB B--- ---- ----", EF(l_sfeq), OR32_W_FLAG },
|
{ "l.sfne", "rA,rB", "11 0x9 00001 AAAAA BBBB B--- ---- ----", EF(l_sfne), OR32_W_FLAG },
|
{ "l.sfne", "rA,rB", "11 0x9 00001 AAAAA BBBB B--- ---- ----", EF(l_sfne), OR32_W_FLAG },
|
{ "l.sfgtu", "rA,rB", "11 0x9 00010 AAAAA BBBB B--- ---- ----", EF(l_sfgtu), OR32_W_FLAG },
|
{ "l.sfgtu", "rA,rB", "11 0x9 00010 AAAAA BBBB B--- ---- ----", EF(l_sfgtu), OR32_W_FLAG },
|
| Line 327... |
Line 335... |
{ "l.cust8_1", "rD", "11 0xF DDDDD ----- ---- ---- ---- ----", EFI, 0 },
|
{ "l.cust8_1", "rD", "11 0xF DDDDD ----- ---- ---- ---- ----", EFI, 0 },
|
{ "l.cust8_2", "rD,rA" , "11 0xF DDDDD AAAAA ---- ---- ---- ----", EFI, 0 },
|
{ "l.cust8_2", "rD,rA" , "11 0xF DDDDD AAAAA ---- ---- ---- ----", EFI, 0 },
|
{ "l.cust8_3", "rD,rA,rB", "11 0xF DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 },
|
{ "l.cust8_3", "rD,rA,rB", "11 0xF DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 },
|
#endif
|
#endif
|
|
|
/* Dummy entry, not included in num_opcodes. This
|
{ "", "", "", EFI, 0 } /* Dummy entry, not included in num_opcodes. This
|
lets code examine entry i+1 without checking
|
lets code examine entry i+1 without checking
|
if we've run off the end of the table. */
|
if we've run off the end of the table. */
|
{ "", "", "", EFI, 0 }
|
|
};
|
};
|
|
|
#undef EFI
|
#undef EFI
|
#undef EFN
|
#undef EFN
|
#undef EF
|
#undef EF
|
|
|
/* Define dummy, if debug is not defined. */
|
/* **INDENT-ON** */
|
|
|
|
/* Define dummy, if debug is not defined. */
|
#if !defined HAS_DEBUG
|
#if !defined HAS_DEBUG
|
static void debug PARAMS ((int, const char *, ...));
|
void debug(int level, const char *format, ...)
|
|
|
static void
|
|
debug (int level, const char *format, ...)
|
|
{
|
{
|
/* Just to get rid of warnings. */
|
/* Just to get rid of warnings. */
|
format = (char *) level = 0;
|
format = level = 0;
|
}
|
}
|
#endif
|
#endif
|
|
|
const unsigned int or32_num_opcodes = ((sizeof(or32_opcodes)) / (sizeof(struct or32_opcode))) - 1;
|
CONST int num_opcodes = ((sizeof(or32_opcodes)) / (sizeof(struct or32_opcode))) - 1;
|
|
|
/* Calculates instruction length in bytes. Always 4 for OR32. */
|
/* Calculates instruction length in bytes. Always 4 for OR32. */
|
|
|
int
|
int
|
insn_len (insn_index)
|
insn_len(int insn_index)
|
int insn_index ATTRIBUTE_UNUSED;
|
|
{
|
{
|
|
insn_index = 0; /* Just to get rid that warning. */
|
return 4;
|
return 4;
|
}
|
}
|
|
|
/* Is individual insn's operand signed or unsigned? */
|
/* Is individual insn's operand signed or unsigned? */
|
|
|
int
|
int
|
letter_signed (l)
|
letter_signed(char l)
|
char l;
|
|
{
|
{
|
const struct or32_letter *pletter;
|
CONST struct or32_letter *pletter;
|
|
|
for (pletter = or32_letters; pletter->letter != '\0'; pletter++)
|
for (pletter = or32_letters; pletter->letter != '\0'; pletter++)
|
if (pletter->letter == l)
|
if (pletter->letter == l)
|
return pletter->sign;
|
return pletter->sign;
|
|
|
printf ("letter_signed(%c): Unknown letter.\n", l);
|
printf ("letter_signed(%c): Unknown letter.\n", l);
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Number of letters in the individual lettered operand. */
|
/* Simple cache for letter ranges */
|
|
static int range_cache[256] = {0};
|
|
|
|
/* Number of letters in the individual lettered operand. */
|
int
|
int
|
letter_range (l)
|
letter_range(char l)
|
char l;
|
|
{
|
{
|
const struct or32_opcode *pinsn;
|
CONST struct or32_opcode *pinsn;
|
char *enc;
|
char *enc;
|
int range = 0;
|
int range = 0;
|
|
|
|
/* Is value cached? */
|
|
if (range = range_cache[(unsigned char)l]) return range;
|
|
|
for (pinsn = or32_opcodes; strlen(pinsn->name); pinsn++)
|
for (pinsn = or32_opcodes; strlen(pinsn->name); pinsn++)
|
{
|
{
|
if (strchr (pinsn->encoding,l))
|
if (strchr (pinsn->encoding,l))
|
{
|
{
|
for (enc = pinsn->encoding; *enc != '\0'; enc++)
|
for (enc = pinsn->encoding; *enc != '\0'; enc++)
|
if ((*enc == '0') && (*(enc+1) == 'x'))
|
if ((*enc == '0') && (*(enc+1) == 'x'))
|
enc += 2;
|
enc += 2;
|
else if (*enc == l)
|
else if (*enc == l)
|
range++;
|
range++;
|
return range;
|
return range_cache[(unsigned char)l] = range;
|
}
|
}
|
}
|
}
|
|
|
printf ("\nABORT: letter_range(%c): Never used letter.\n", l);
|
printf ("\nABORT: letter_range(%c): Never used letter.\n", l);
|
exit (1);
|
exit (1);
|
}
|
}
|
|
|
/* MM: Returns index of given instruction name. */
|
/* MM: Returns index of given instruction name. */
|
|
|
int
|
int
|
insn_index (char *insn)
|
insn_index (char *insn)
|
{
|
{
|
unsigned int i;
|
int i, found = -1;
|
int found = -1;
|
for (i = 0; i < num_opcodes; i++)
|
|
|
for (i = 0; i < or32_num_opcodes; i++)
|
|
if (!strcmp (or32_opcodes[i].name, insn))
|
if (!strcmp (or32_opcodes[i].name, insn))
|
{
|
{
|
found = i;
|
found = i;
|
break;
|
break;
|
}
|
}
|
return found;
|
return found;
|
}
|
}
|
|
|
const char *
|
/* Returns name of the specified instruction index */
|
insn_name (index)
|
CONST char *
|
int index;
|
insn_name(int index)
|
{
|
{
|
if (index >= 0 && index < (int) or32_num_opcodes)
|
if (index >= 0 && index < num_opcodes)
|
return or32_opcodes[index].name;
|
return or32_opcodes[index].name;
|
else
|
else
|
return "???";
|
return "???";
|
}
|
}
|
|
|
void
|
void
|
l_none ()
|
l_none ()
|
{
|
{
|
}
|
}
|
|
|
/* Finite automata for instruction decoding building code. */
|
/*** Finite automata for instruction decoding building code ***/
|
|
|
/* Find simbols in encoding. */
|
/* Find simbols in encoding. */
|
static unsigned long
|
unsigned long
|
insn_extract (param_ch, enc_initial)
|
insn_extract (param_ch, enc_initial)
|
char param_ch;
|
char param_ch;
|
char *enc_initial;
|
char *enc_initial;
|
{
|
{
|
char *enc;
|
char *enc;
|
unsigned long ret = 0;
|
unsigned long ret = 0;
|
unsigned opc_pos = 32;
|
unsigned opc_pos = 32;
|
|
|
for (enc = enc_initial; *enc != '\0'; )
|
for (enc = enc_initial; *enc != '\0'; )
|
if ((*enc == '0') && (*(enc + 1) == 'x'))
|
if ((*enc == '0') && (*(enc + 1) == 'x'))
|
{
|
{
|
unsigned long tmp = strtol (enc+2, NULL, 16);
|
unsigned long tmp = strtol (enc+2, NULL, 16);
|
|
|
opc_pos -= 4;
|
opc_pos -= 4;
|
if (param_ch == '0' || param_ch == '1')
|
if (param_ch == '0' || param_ch == '1')
|
{
|
{
|
if (param_ch == '0')
|
if (param_ch == '0')
|
tmp = 15 - tmp;
|
tmp = 15 - tmp;
|
| Line 464... |
Line 465... |
}
|
}
|
enc += 3;
|
enc += 3;
|
}
|
}
|
else
|
else
|
{
|
{
|
if (*enc == '0' || *enc == '1' || *enc == '-' || ISALPHA (*enc))
|
if (*enc == '0' || *enc == '1' || *enc == '-' || isalpha(*enc) )
|
{
|
{
|
opc_pos--;
|
opc_pos--;
|
if (param_ch == *enc)
|
if (param_ch == *enc)
|
ret |= 1 << opc_pos;
|
ret |= 1 << opc_pos;
|
}
|
}
|
| Line 501... |
Line 502... |
struct insn_op_struct *op_data, **op_start;
|
struct insn_op_struct *op_data, **op_start;
|
|
|
/* Recursive utility function used to find best match and to build automata. */
|
/* Recursive utility function used to find best match and to build automata. */
|
|
|
static unsigned long *
|
static unsigned long *
|
cover_insn (cur, pass, mask)
|
cover_insn (unsigned long *cur, int pass, unsigned int mask)
|
unsigned long * cur;
|
{
|
int pass;
|
int best_first = 0, best_len = 0, i, last_match = -1, ninstr = 0;
|
unsigned int mask;
|
|
{
|
|
int best_first = 0, last_match = -1, ninstr = 0;
|
|
unsigned int best_len = 0;
|
|
unsigned int i;
|
|
unsigned long cur_mask = mask;
|
unsigned long cur_mask = mask;
|
unsigned long *next;
|
unsigned long *next;
|
|
|
for (i = 0; i < or32_num_opcodes; i++)
|
for (i = 0; i < num_opcodes; i++)
|
if (ti[i].in_pass == pass)
|
if (ti[i].in_pass == pass)
|
{
|
{
|
cur_mask &= ti[i].insn_mask;
|
cur_mask &= ti[i].insn_mask;
|
ninstr++;
|
ninstr++;
|
last_match = i;
|
last_match = i;
|
}
|
}
|
|
|
debug (8, "%08X %08X\n", mask, cur_mask);
|
debug (8, "%08X %08X\n", mask, cur_mask);
|
|
|
if (ninstr == 0)
|
if (ninstr == 0)
|
return 0;
|
return 0;
|
|
|
if (ninstr == 1)
|
if (ninstr == 1)
|
{
|
{
|
/* Leaf holds instruction index. */
|
/* Leaf holds instruction index. */
|
debug (8, "%i>I%i %s\n",
|
debug(8, "%i>I%i %s\n", cur - automata, last_match, or32_opcodes[last_match].name);
|
cur - automata, last_match, or32_opcodes[last_match].name);
|
|
|
|
*cur = LEAF_FLAG | last_match;
|
*cur = LEAF_FLAG | last_match;
|
cur++;
|
cur++;
|
nuncovered--;
|
nuncovered--;
|
}
|
} else {
|
else
|
|
{
|
|
/* Find longest match. */
|
/* Find longest match. */
|
for (i = 0; i < 32; i++)
|
for (i = 0; i < 32; i++)
|
{
|
{
|
unsigned int len;
|
int len;
|
|
|
for (len = best_len + 1; len < MIN (MAX_LEN, 33 - i); len++)
|
for (len = best_len + 1; len < MIN (MAX_LEN, 33 - i); len++)
|
{
|
{
|
unsigned long m = (1UL << ((unsigned long)len)) - 1;
|
unsigned long m = (1UL << ((unsigned long)len)) - 1;
|
|
debug(9, " (%i(%08X & %08X>>%i = %08X, %08X)",len,m, cur_mask, i, (cur_mask >> (unsigned)i), (cur_mask >> (unsigned)i) & m);
|
debug (9, " (%i(%08X & %08X>>%i = %08X, %08X)",
|
|
len,m, cur_mask, i, (cur_mask >> (unsigned)i),
|
|
(cur_mask >> (unsigned)i) & m);
|
|
|
|
if ((m & (cur_mask >> (unsigned)i)) == m)
|
if ((m & (cur_mask >> (unsigned)i)) == m)
|
{
|
{
|
best_len = len;
|
best_len = len;
|
best_first = i;
|
best_first = i;
|
debug (9, "!");
|
debug (9, "!");
|
}
|
}
|
else
|
else
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
debug (9, "\n");
|
debug (9, "\n");
|
|
|
if (!best_len)
|
if (!best_len)
|
{
|
{
|
fprintf (stderr, "%i instructions match mask 0x%08X:\n", ninstr, mask);
|
fprintf (stderr, "%i instructions match mask 0x%08X:\n", ninstr, mask);
|
|
for (i = 0; i < num_opcodes; i++)
|
for (i = 0; i < or32_num_opcodes; i++)
|
|
if (ti[i].in_pass == pass)
|
if (ti[i].in_pass == pass)
|
fprintf (stderr, "%s ", or32_opcodes[i].name);
|
fprintf (stderr, "%s ", or32_opcodes[i].name);
|
|
|
fprintf (stderr, "\n");
|
fprintf (stderr, "\n");
|
exit (1);
|
exit (1);
|
}
|
}
|
|
debug(8, "%i> #### %i << %i (%i) ####\n", cur - automata, best_len, best_first, ninstr);
|
debug (8, "%i> #### %i << %i (%i) ####\n",
|
|
cur - automata, best_len, best_first, ninstr);
|
|
|
|
*cur = best_first;
|
*cur = best_first;
|
cur++;
|
cur++;
|
*cur = (1 << best_len) - 1;
|
*cur = (1 << best_len) - 1;
|
cur++;
|
cur++;
|
next = cur;
|
next = cur;
|
|
|
/* Allocate space for pointers. */
|
/* Allocate space for pointers. */
|
cur += 1 << best_len;
|
cur += 1 << best_len;
|
cur_mask = (1 << (unsigned long)best_len) - 1;
|
cur_mask = (1 << (unsigned long)best_len) - 1;
|
|
|
for (i = 0; i < ((unsigned) 1 << best_len); i++)
|
for (i = 0; i < (1 << (unsigned long)best_len); i++)
|
{
|
{
|
unsigned int j;
|
int j;
|
unsigned long *c;
|
unsigned long *c;
|
|
|
curpass++;
|
curpass++;
|
for (j = 0; j < or32_num_opcodes; j++)
|
for (j = 0; j < num_opcodes; j++)
|
if (ti[j].in_pass == pass
|
if (ti[j].in_pass == pass
|
&& ((ti[j].insn >> best_first) & cur_mask) == (unsigned long) i
|
&& ((ti[j].insn >> best_first) & cur_mask) == (unsigned long) i
|
&& ((ti[j].insn_mask >> best_first) & cur_mask) == cur_mask)
|
&& ((ti[j].insn_mask >> best_first) & cur_mask) == cur_mask)
|
ti[j].in_pass = curpass;
|
ti[j].in_pass = curpass;
|
|
|
| Line 620... |
Line 597... |
}
|
}
|
return cur;
|
return cur;
|
}
|
}
|
|
|
/* Returns number of nonzero bits. */
|
/* Returns number of nonzero bits. */
|
|
|
static int
|
static int
|
num_ones (value)
|
num_ones (unsigned long value)
|
unsigned long value;
|
|
{
|
{
|
int c = 0;
|
int c = 0;
|
|
|
while (value)
|
while (value)
|
{
|
{
|
if (value & 1)
|
if (value & 1)
|
c++;
|
c++;
|
value >>= 1;
|
value >>= 1;
|
| Line 640... |
Line 614... |
|
|
/* Utility function, which converts parameters from or32_opcode format to more binary form.
|
/* Utility function, which converts parameters from or32_opcode format to more binary form.
|
Parameters are stored in ti struct. */
|
Parameters are stored in ti struct. */
|
|
|
static struct insn_op_struct *
|
static struct insn_op_struct *
|
parse_params (opcode, cur)
|
parse_params (CONST struct or32_opcode *opcode, struct insn_op_struct *cur)
|
const struct or32_opcode * opcode;
|
|
struct insn_op_struct * cur;
|
|
{
|
{
|
char *args = opcode->args;
|
char *args = opcode->args;
|
int i, type;
|
int i, type;
|
|
|
i = 0;
|
i = 0;
|
type = 0;
|
type = 0;
|
/* In case we don't have any parameters, we add dummy read from r0. */
|
/* In case we don't have any parameters, we add dummy read from r0. */
|
|
if (!(*args)) {
|
if (!(*args))
|
|
{
|
|
cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
|
cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
|
cur->data = 0;
|
cur->data = 0;
|
debug (9, "#%08X %08X\n", cur->type, cur->data);
|
debug (9, "#%08X %08X\n", cur->type, cur->data);
|
cur++;
|
cur++;
|
return cur;
|
return cur;
|
| Line 667... |
Line 637... |
if (*args == 'r')
|
if (*args == 'r')
|
{
|
{
|
args++;
|
args++;
|
type |= OPTYPE_REG;
|
type |= OPTYPE_REG;
|
}
|
}
|
else if (ISALPHA (*args))
|
else if (isalpha (*args))
|
{
|
{
|
unsigned long arg;
|
unsigned long arg;
|
|
|
arg = insn_extract (*args, opcode->encoding);
|
arg = insn_extract (*args, opcode->encoding);
|
debug (9, "%s : %08X ------\n", opcode->name, arg);
|
debug (9, "%s : %08X ------\n", opcode->name, arg);
|
if (letter_signed (*args))
|
if (letter_signed (*args))
|
{
|
{
|
type |= OPTYPE_SIG;
|
type |= OPTYPE_SIG;
|
| Line 684... |
Line 653... |
/* Split argument to sequences of consecutive ones. */
|
/* Split argument to sequences of consecutive ones. */
|
while (arg)
|
while (arg)
|
{
|
{
|
int shr = 0;
|
int shr = 0;
|
unsigned long tmp = arg, mask = 0;
|
unsigned long tmp = arg, mask = 0;
|
|
|
while ((tmp & 1) == 0)
|
while ((tmp & 1) == 0)
|
{
|
{
|
shr++;
|
shr++;
|
tmp >>= 1;
|
tmp >>= 1;
|
}
|
}
|
| Line 742... |
Line 710... |
{
|
{
|
fprintf (stderr, "%s : parse error in args.\n", opcode->name);
|
fprintf (stderr, "%s : parse error in args.\n", opcode->name);
|
exit (1);
|
exit (1);
|
}
|
}
|
}
|
}
|
|
|
cur--;
|
cur--;
|
cur->type = type | cur->type | OPTYPE_OP | OPTYPE_LAST;
|
cur->type = type | cur->type | OPTYPE_OP | OPTYPE_LAST;
|
debug (9, "#%08X %08X\n", cur->type, cur->data);
|
debug (9, "#%08X %08X\n", cur->type, cur->data);
|
cur++;
|
cur++;
|
|
|
return cur;
|
return cur;
|
}
|
}
|
|
|
/* Constructs new automata based on or32_opcodes array. */
|
/* Constructs new automata based on or32_opcodes array. */
|
|
|
void
|
void
|
build_automata ()
|
build_automata ()
|
{
|
{
|
unsigned int i;
|
int i;
|
unsigned long *end;
|
unsigned long *end;
|
struct insn_op_struct *cur;
|
struct insn_op_struct *cur;
|
|
|
automata = (unsigned long *) malloc (MAX_AUTOMATA_SIZE * sizeof (unsigned long));
|
automata = (unsigned long *) malloc (MAX_AUTOMATA_SIZE * sizeof (unsigned long));
|
ti = (struct temp_insn_struct *) malloc (sizeof (struct temp_insn_struct) * or32_num_opcodes);
|
ti = (struct temp_insn_struct *) malloc (sizeof (struct temp_insn_struct) * num_opcodes);
|
|
|
|
nuncovered = num_opcodes;
|
|
|
nuncovered = or32_num_opcodes;
|
#ifdef HAS_EXECUTION
|
printf ("Building automata... ");
|
printf ("Building automata... ");
|
|
#endif
|
|
|
/* Build temporary information about instructions. */
|
/* Build temporary information about instructions. */
|
for (i = 0; i < or32_num_opcodes; i++)
|
for (i = 0; i < num_opcodes; i++)
|
{
|
{
|
unsigned long ones, zeros;
|
unsigned long ones, zeros;
|
char *encoding = or32_opcodes[i].encoding;
|
char *encoding = or32_opcodes[i].encoding;
|
|
|
ones = insn_extract('1', encoding);
|
ones = insn_extract('1', encoding);
|
zeros = insn_extract('0', encoding);
|
zeros = insn_extract('0', encoding);
|
|
|
ti[i].insn_mask = ones | zeros;
|
ti[i].insn_mask = ones | zeros;
|
ti[i].insn = ones;
|
ti[i].insn = ones;
|
ti[i].in_pass = curpass = 0;
|
ti[i].in_pass = curpass = 0;
|
|
|
/*debug(9, "%s: %s %08X %08X\n", or32_opcodes[i].name,
|
/*debug(9, "%s: %s %08X %08X\n", or32_opcodes[i].name,
|
or32_opcodes[i].encoding, ti[i].insn_mask, ti[i].insn);*/
|
or32_opcodes[i].encoding, ti[i].insn_mask, ti[i].insn);*/
|
}
|
}
|
|
|
/* Until all are covered search for best criteria to separate them. */
|
/* Until all are covered search for best criteria to separate them. */
|
end = cover_insn (automata, curpass, 0xFFFFFFFF);
|
end = cover_insn (automata, curpass, 0xFFFFFFFF);
|
|
|
if (end - automata > MAX_AUTOMATA_SIZE)
|
if (end - automata > MAX_AUTOMATA_SIZE)
|
{
|
{
|
fprintf (stderr, "Automata too large. Increase MAX_AUTOMATA_SIZE.");
|
fprintf (stderr, "Automata too large. Increase MAX_AUTOMATA_SIZE.");
|
exit (1);
|
exit (1);
|
}
|
}
|
|
#ifdef HAS_EXECUTION
|
|
printf("done, num uncovered: %i/%i.\n", nuncovered, num_opcodes);
|
|
#endif
|
|
|
printf ("done, num uncovered: %i/%i.\n", nuncovered, or32_num_opcodes);
|
#ifdef HAS_EXECUTION
|
printf ("Parsing operands data... ");
|
printf ("Parsing operands data... ");
|
|
#endif
|
op_data = (struct insn_op_struct *) malloc (MAX_OP_TABLE_SIZE * sizeof (struct insn_op_struct));
|
op_data = (struct insn_op_struct *) malloc (MAX_OP_TABLE_SIZE * sizeof (struct insn_op_struct));
|
op_start = (struct insn_op_struct **) malloc (or32_num_opcodes * sizeof (struct insn_op_struct *));
|
op_start = (struct insn_op_struct **) malloc (num_opcodes * sizeof (struct insn_op_struct *));
|
cur = op_data;
|
cur = op_data;
|
|
for (i = 0; i < num_opcodes; i++)
|
for (i = 0; i < or32_num_opcodes; i++)
|
|
{
|
{
|
op_start[i] = cur;
|
op_start[i] = cur;
|
cur = parse_params (&or32_opcodes[i], cur);
|
cur = parse_params (&or32_opcodes[i], cur);
|
|
|
if (cur - op_data > MAX_OP_TABLE_SIZE)
|
if (cur - op_data > MAX_OP_TABLE_SIZE)
|
{
|
{
|
fprintf (stderr, "Operands table too small, increase MAX_OP_TABLE_SIZE.\n");
|
fprintf (stderr, "Operands table too small, increase MAX_OP_TABLE_SIZE.\n");
|
exit (1);
|
exit (1);
|
}
|
}
|
}
|
}
|
|
#ifdef HAS_EXECUTION
|
printf ("done.\n");
|
printf ("done.\n");
|
|
#endif
|
}
|
}
|
|
|
void
|
void destruct_automata ()
|
destruct_automata ()
|
|
{
|
{
|
free (ti);
|
free (ti);
|
free (automata);
|
free (automata);
|
free (op_data);
|
free (op_data);
|
free (op_start);
|
free (op_start);
|
}
|
}
|
|
|
/* Decodes instruction and returns instruction index. */
|
/* Decodes instruction and returns instruction index. */
|
|
int insn_decode (unsigned int insn)
|
int
|
|
insn_decode (insn)
|
|
unsigned int insn;
|
|
{
|
{
|
unsigned long *a = automata;
|
unsigned long *a = automata;
|
int i;
|
int i;
|
|
|
while (!(*a & LEAF_FLAG))
|
while (!(*a & LEAF_FLAG))
|
{
|
{
|
unsigned int first = *a;
|
unsigned int first = *a;
|
|
//debug(9, "%i ", a - automata);
|
debug (9, "%i ", a - automata);
|
|
|
|
a++;
|
a++;
|
i = (insn >> first) & *a;
|
i = (insn >> first) & *a;
|
a++;
|
a++;
|
if (!*(a + i))
|
if (!*(a + i))
|
{
|
{ /* Invalid instruction found? */
|
/* Invalid instruction found? */
|
//debug(9, "XXX\n", i);
|
debug (9, "XXX\n", i);
|
|
return -1;
|
return -1;
|
}
|
}
|
a = automata + *(a + i);
|
a = automata + *(a + i);
|
}
|
}
|
|
|
i = *a & ~LEAF_FLAG;
|
i = *a & ~LEAF_FLAG;
|
|
//debug(9, "%i\n", i);
|
debug (9, "%i\n", i);
|
|
|
|
/* Final check - do we have direct match?
|
/* Final check - do we have direct match?
|
(based on or32_opcodes this should be the only possibility,
|
(based on or32_opcodes this should be the only possibility,
|
but in case of invalid/missing instruction we must perform a check) */
|
but in case of invalid/missing instruction we must perform a check) */
|
if ((ti[i].insn_mask & insn) == ti[i].insn)
|
if ((ti[i].insn_mask & insn) == ti[i].insn)
|
return i;
|
return i;
|
| Line 868... |
Line 826... |
|
|
/* Automagically does zero- or sign- extension and also finds correct
|
/* Automagically does zero- or sign- extension and also finds correct
|
sign bit position if sign extension is correct extension. Which extension
|
sign bit position if sign extension is correct extension. Which extension
|
is proper is figured out from letter description. */
|
is proper is figured out from letter description. */
|
|
|
static unsigned long
|
unsigned long
|
extend_imm (imm, l)
|
extend_imm(unsigned long imm, char l)
|
unsigned long imm;
|
|
char l;
|
|
{
|
{
|
unsigned long mask;
|
unsigned long mask;
|
int letter_bits;
|
int letter_bits;
|
|
|
/* First truncate all bits above valid range for this letter
|
/* First truncate all bits above valid range for this letter
|
| Line 889... |
Line 845... |
imm |= (~mask);
|
imm |= (~mask);
|
|
|
return imm;
|
return imm;
|
}
|
}
|
|
|
static unsigned long
|
unsigned long
|
or32_extract (param_ch, enc_initial, insn)
|
or32_extract (param_ch, enc_initial, insn)
|
char param_ch;
|
char param_ch;
|
char *enc_initial;
|
char *enc_initial;
|
unsigned long insn;
|
unsigned long insn;
|
{
|
{
|
| Line 913... |
Line 869... |
|
|
#if DEBUG
|
#if DEBUG
|
printf ("or32_extract: %x ", param_pos);
|
printf ("or32_extract: %x ", param_pos);
|
#endif
|
#endif
|
opc_pos = 32;
|
opc_pos = 32;
|
|
|
for (enc = enc_initial; *enc != '\0'; )
|
for (enc = enc_initial; *enc != '\0'; )
|
if ((*enc == '0') && (*(enc + 1) == 'x'))
|
if ((*enc == '0') && (*(enc + 1) == 'x'))
|
{
|
{
|
opc_pos -= 4;
|
opc_pos -= 4;
|
if ((param_ch == '0') || (param_ch == '1'))
|
if ((param_ch == '0') || (param_ch == '1'))
|
| Line 944... |
Line 899... |
opc_pos--;
|
opc_pos--;
|
param_pos--;
|
param_pos--;
|
#if DEBUG
|
#if DEBUG
|
printf ("\n ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos, param_pos);
|
printf ("\n ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos, param_pos);
|
#endif
|
#endif
|
if (ISLOWER (param_ch))
|
if (islower(param_ch))
|
ret -= ((insn >> opc_pos) & 0x1) << param_pos;
|
ret -= ((insn >> opc_pos) & 0x1) << param_pos;
|
else
|
else
|
ret += ((insn >> opc_pos) & 0x1) << param_pos;
|
ret += ((insn >> opc_pos) & 0x1) << param_pos;
|
enc++;
|
enc++;
|
}
|
}
|
else if (ISALPHA (*enc))
|
else if (isalpha(*enc))
|
{
|
{
|
opc_pos--;
|
opc_pos--;
|
enc++;
|
enc++;
|
}
|
}
|
else if (*enc == '-')
|
else if (*enc == '-')
|
| Line 971... |
Line 926... |
return ret;
|
return ret;
|
}
|
}
|
|
|
/* Print register. Used only by print_insn. */
|
/* Print register. Used only by print_insn. */
|
|
|
static void
|
static char *
|
or32_print_register (param_ch, encoding, insn)
|
or32_print_register (dest, param_ch, encoding, insn)
|
|
char *dest;
|
char param_ch;
|
char param_ch;
|
char *encoding;
|
char *encoding;
|
unsigned long insn;
|
unsigned long insn;
|
{
|
{
|
int regnum = or32_extract(param_ch, encoding, insn);
|
int regnum = or32_extract(param_ch, encoding, insn);
|
|
|
sprintf (disassembled, "%sr%d", disassembled, regnum);
|
sprintf (dest, "r%d", regnum);
|
|
while (*dest) dest++;
|
|
return dest;
|
}
|
}
|
|
|
/* Print immediate. Used only by print_insn. */
|
/* Print immediate. Used only by print_insn. */
|
|
|
static void
|
static char *
|
or32_print_immediate (param_ch, encoding, insn)
|
or32_print_immediate (dest, param_ch, encoding, insn)
|
|
char *dest;
|
char param_ch;
|
char param_ch;
|
char *encoding;
|
char *encoding;
|
unsigned long insn;
|
unsigned long insn;
|
{
|
{
|
int imm = or32_extract (param_ch, encoding, insn);
|
int imm = or32_extract (param_ch, encoding, insn);
|
| Line 997... |
Line 956... |
imm = extend_imm (imm, param_ch);
|
imm = extend_imm (imm, param_ch);
|
|
|
if (letter_signed (param_ch))
|
if (letter_signed (param_ch))
|
{
|
{
|
if (imm < 0)
|
if (imm < 0)
|
sprintf (disassembled, "%s%d", disassembled, imm);
|
sprintf (dest, "%d", imm);
|
else
|
else
|
sprintf (disassembled, "%s0x%x", disassembled, imm);
|
sprintf (dest, "0x%x", imm);
|
}
|
}
|
else
|
else
|
sprintf (disassembled, "%s%#x", disassembled, imm);
|
sprintf (dest, "%#x", imm);
|
|
while (*dest) dest++;
|
|
return dest;
|
}
|
}
|
|
|
/* Disassemble one instruction from insn to disassemble.
|
/* Disassemble one instruction from insn to disassemble.
|
Return the size of the instruction. */
|
Return the size of the instruction. */
|
|
|
int
|
int
|
disassemble_insn (insn)
|
disassemble_insn (insn)
|
unsigned long insn;
|
unsigned long insn;
|
{
|
{
|
int index;
|
int index;
|
index = insn_decode (insn);
|
return disassemble_index (insn, insn_decode (insn));
|
|
}
|
|
|
|
/* Disassemble one instruction from insn index.
|
|
Return the size of the instruction. */
|
|
|
|
int
|
|
disassemble_index (insn, index)
|
|
unsigned long insn;
|
|
int index;
|
|
{
|
|
char *dest = disassembled;
|
if (index >= 0)
|
if (index >= 0)
|
{
|
{
|
struct or32_opcode const *opcode = &or32_opcodes[index];
|
struct or32_opcode const *opcode = &or32_opcodes[index];
|
char *s;
|
char *s;
|
|
|
sprintf (disassembled, "%s ", opcode->name);
|
strcpy (dest, opcode->name);
|
|
while (*dest) dest++;
|
|
*dest++ = ' ';
|
|
*dest = 0;
|
|
|
for (s = opcode->args; *s != '\0'; ++s)
|
for (s = opcode->args; *s != '\0'; ++s)
|
{
|
{
|
switch (*s)
|
switch (*s)
|
{
|
{
|
case '\0':
|
case '\0':
|
return 4;
|
return insn_len (insn);
|
|
|
case 'r':
|
case 'r':
|
or32_print_register (*++s, opcode->encoding, insn);
|
dest = or32_print_register(dest, *++s, opcode->encoding, insn);
|
break;
|
break;
|
|
|
default:
|
default:
|
if (strchr (opcode->encoding, *s))
|
if (strchr (opcode->encoding, *s))
|
or32_print_immediate (*s, opcode->encoding, insn);
|
dest = or32_print_immediate (dest, *s, opcode->encoding, insn);
|
else
|
else {
|
sprintf (disassembled, "%s%c", disassembled, *s);
|
*dest++ = *s;
|
|
*dest = 0;
|
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
else
|
else
|
{
|
{
|
/* This used to be %8x for binutils. */
|
/* This used to be %8x for binutils. */
|
sprintf (disassembled, "%s.word 0x%08lx", disassembled, insn);
|
sprintf(dest, ".word 0x%08x", insn);
|
|
while (*dest) dest++;
|
}
|
}
|
|
|
return insn_len (insn);
|
return insn_len (insn);
|
}
|
}
|
|
|
No newline at end of file
|
No newline at end of file
|
