URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [mp3/] [rtl/] [verilog/] [mem_if/] [sram_top.v] - Diff between revs 266 and 562

Rev 266	Rev 562
Line 44...	Line 44...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.1.1.1 2001/11/04 19:00:09 lampret`
	`// First import.`
	`//`
`//`	`//`

`// synopsys translate_off`	`// synopsys translate_off`
`include "timescale.v"	`include "timescale.v"
`// synopsys translate_on`	`// synopsys translate_on`
Line 223...	Line 226...
`l0_wen <= 1'b1;`	`l0_wen <= 1'b1;`
`else`	`else`
`if(wb_cyc_i & wb_stb_i & wb_we_i & (\|wb_sel_i[1:0]) & ~wb_ack_o)`	`if(wb_cyc_i & wb_stb_i & wb_we_i & (\|wb_sel_i[1:0]) & ~wb_ack_o)`
`l0_wen <= #1 1'b0;`	`l0_wen <= #1 1'b0;`
`else`	`else`
`l0_wen <= 1'b1;`	`l0_wen <= #1 1'b1;`
`end`	`end`


`// WE`	`// WE`
`always @ (posedge clk or negedge rstn)`	`always @ (posedge clk or negedge rstn)`
Line 236...	Line 239...
`r0_wen <= 1'b1;`	`r0_wen <= 1'b1;`
`else`	`else`
`if(wb_cyc_i & wb_stb_i & wb_we_i & (\|wb_sel_i[3:2]) & ~wb_ack_o)`	`if(wb_cyc_i & wb_stb_i & wb_we_i & (\|wb_sel_i[3:2]) & ~wb_ack_o)`
`r0_wen <= #1 1'b0;`	`r0_wen <= #1 1'b0;`
`else`	`else`
`r0_wen <= 1'b1;`	`r0_wen <= #1 1'b1;`
`end`	`end`


`// CE`	`// CE`
`assign l_cen = ~(wb_cyc_i & wb_stb_i);`	`assign l_cen = ~(wb_cyc_i & wb_stb_i);`