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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.6.4.2 2003/12/05 00:09:49 lampret
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// No functional change.
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//
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// Revision 1.6.4.1 2003/07/08 15:36:37 lampret
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// Added embedded memory QMEM.
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//
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// Revision 1.6 2002/07/31 02:04:35 lampret
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// MAC now follows software convention (signed multiply instead of unsigned).
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//
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// Revision 1.5 2002/07/14 22:17:17 lampret
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// Revision 1.5 2002/07/14 22:17:17 lampret
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// Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized.
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// Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized.
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//
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//
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// Revision 1.4 2002/03/29 15:16:55 lampret
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// Revision 1.4 2002/03/29 15:16:55 lampret
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// Some of the warnings fixed.
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// Some of the warnings fixed.
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//
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//
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// 2. Inserting NOPs in the middle of pipeline only if supported:
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// 2. Inserting NOPs in the middle of pipeline only if supported:
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// At this time, only ex_freeze (and wb_freeze) can be deassrted when id_freeze (and if_freeze) are asserted.
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// At this time, only ex_freeze (and wb_freeze) can be deassrted when id_freeze (and if_freeze) are asserted.
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// This way NOP is asserted from stage ID into EX stage.
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// This way NOP is asserted from stage ID into EX stage.
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//
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//
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//assign genpc_freeze = du_stall | flushpipe_r | lsu_stall;
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assign genpc_freeze = du_stall | flushpipe_r;
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assign genpc_freeze = du_stall | flushpipe_r;
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assign if_freeze = id_freeze | extend_flush;
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assign if_freeze = id_freeze | extend_flush;
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//assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) & ~flushpipe | du_stall;
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//assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) & ~flushpipe | du_stall;
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assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) | du_stall | mac_stall;
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assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) | du_stall | mac_stall;
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assign ex_freeze = wb_freeze;
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assign ex_freeze = wb_freeze;
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//
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//
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always @(posedge clk or posedge rst)
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always @(posedge clk or posedge rst)
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if (rst)
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if (rst)
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multicycle_cnt <= #1 3'b0;
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multicycle_cnt <= #1 3'b0;
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else if (multicycle_cnt)
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else if (multicycle_cnt)
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multicycle_cnt <= #1 multicycle_cnt - 'd1;
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multicycle_cnt <= #1 multicycle_cnt - 1'd1;
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else if (multicycle & !ex_freeze)
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else if (multicycle & !ex_freeze)
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multicycle_cnt <= #1 multicycle;
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multicycle_cnt <= #1 multicycle;
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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