URL
https://opencores.org/ocsvn/or1k/or1k/trunk
[/] [or1k/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_top.v] - Diff between revs 1267 and 1293
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 1267 |
Rev 1293 |
Line 42... |
Line 42... |
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//
|
//
|
// CVS Revision History
|
// CVS Revision History
|
//
|
//
|
// $Log: not supported by cvs2svn $
|
// $Log: not supported by cvs2svn $
|
|
// Revision 1.12 2004/04/05 08:29:57 lampret
|
|
// Merged branch_qmem into main tree.
|
|
//
|
// Revision 1.10.4.9 2004/02/11 01:40:11 lampret
|
// Revision 1.10.4.9 2004/02/11 01:40:11 lampret
|
// preliminary HW breakpoints support in debug unit (by default disabled). To enable define OR1200_DU_HWBKPTS.
|
// preliminary HW breakpoints support in debug unit (by default disabled). To enable define OR1200_DU_HWBKPTS.
|
//
|
//
|
// Revision 1.10.4.8 2004/01/17 21:14:14 simons
|
// Revision 1.10.4.8 2004/01/17 21:14:14 simons
|
// Errors fixed.
|
// Errors fixed.
|
Line 986... |
Line 989... |
.spr_write(spr_we),
|
.spr_write(spr_we),
|
.spr_addr(spr_addr),
|
.spr_addr(spr_addr),
|
.spr_dat_i(spr_dat_cpu),
|
.spr_dat_i(spr_dat_cpu),
|
.spr_dat_o(spr_dat_pic),
|
.spr_dat_o(spr_dat_pic),
|
.pic_wakeup(pic_wakeup),
|
.pic_wakeup(pic_wakeup),
|
.int(sig_int),
|
.intr(sig_int),
|
|
|
// PIC Interface
|
// PIC Interface
|
.pic_int(pic_ints_i)
|
.pic_int(pic_ints_i)
|
);
|
);
|
|
|
Line 1005... |
Line 1008... |
.spr_cs(spr_cs[`OR1200_SPR_GROUP_TT]),
|
.spr_cs(spr_cs[`OR1200_SPR_GROUP_TT]),
|
.spr_write(spr_we),
|
.spr_write(spr_we),
|
.spr_addr(spr_addr),
|
.spr_addr(spr_addr),
|
.spr_dat_i(spr_dat_cpu),
|
.spr_dat_i(spr_dat_cpu),
|
.spr_dat_o(spr_dat_tt),
|
.spr_dat_o(spr_dat_tt),
|
.int(sig_tick)
|
.intr(sig_tick)
|
);
|
);
|
|
|
//
|
//
|
// Instantiation of Power Management
|
// Instantiation of Power Management
|
//
|
//
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.