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Line 22... |
optimization methods, it has a bit strange memory model. It is abstract and
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optimization methods, it has a bit strange memory model. It is abstract and
|
physical at the same time. I can't really explain, just check the sources if
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physical at the same time. I can't really explain, just check the sources if
|
interested. Some other things are strange or incomplete too (like
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interested. Some other things are strange or incomplete too (like
|
C library emulation, currently supports only printf via simprintf).
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C library emulation, currently supports only printf via simprintf).
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|
|
MMMU directory is not functional. Someday (Nov/1999 probably) it
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MMU directory is not functional. Someday it will be filled with code for
|
will be filled with code for virtual memory simulation.
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virtual memory simulation.
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|
|
|
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Installation
|
Installation
|
============
|
============
|
|
|
To compile, run the configure script and specify the target architecture.
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To compile, run the configure script and specify the target architecture.
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Example:
|
Example:
|
|
|
$ ./configure --target=or1k
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$ ./configure --target=or32
|
|
|
After that, just issue "make all" command. By default there should be no
|
After that, just issue "make all" command. By default there should be no
|
warnings. There is no "make install". Just use it from default location
|
warnings. There is no "make install". Just use it from default location
|
or copy it to your bin directory (usually something like /usr/local/bin
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or copy it to your bin directory (usually something like /usr/local/bin
|
or ~/bin).
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or ~/bin).
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Line 48... |
and recompile everything (do 'make all' again).
|
and recompile everything (do 'make all' again).
|
|
|
Simulator test
|
Simulator test
|
==============
|
==============
|
|
|
Issue 'sim testbench/dhry.or1k' or 'sim testbench/dhry.dlx' to
|
Issue 'sim testbench/dhry.or32' or 'sim testbench/dhry.dlx' to
|
test simulator. See testbench/README for details about Dhrystone 2.1
|
test simulator. See testbench/README for details about Dhrystone 2.1
|
benchmark.
|
benchmark.
|
|
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OpenRISC and open cores
|
OpenRISC and open cores
|
=======================
|
=======================
|
