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Line 1... |
/* stats.c -- Various statistics about instruction scheduling etc.
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/* stats.c -- Various statistics about instruction scheduling etc.
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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Copyright (C) 2008 Embecosm Limited
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This file is part of OpenRISC 1000 Architectural Simulator.
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Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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This program is free software; you can redistribute it and/or modify
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This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include <stdio.h>
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#include <ctype.h>
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#include <string.h>
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#include "config.h"
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This program is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3 of the License, or (at your option)
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any later version.
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#ifdef HAVE_INTTYPES_H
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This program is distributed in the hope that it will be useful, but WITHOUT
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#include <inttypes.h>
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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#endif
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along
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with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* This program is commented throughout in a fashion suitable for processing
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with Doxygen. */
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/* Autoconf and/or portability configuration */
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#include "config.h"
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#include "port.h"
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#include "port.h"
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#include "arch.h"
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#include "abstract.h"
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/* Package includes */
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#include "stats.h"
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#include "sim-config.h"
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#include "sim-config.h"
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#include "spr_defs.h"
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#include "icache-model.h"
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#include "opcode/or32.h"
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#include "spr-defs.h"
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#include "execute.h"
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#include "execute.h"
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#include "sprs.h"
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#include "debug.h"
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#include "stats.h"
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#include "icache_model.h"
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struct branchstat {
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#define DSTATS_LEN 3000
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#define SSTATS_LEN 300
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#define FSTATS_LEN 200
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#define RAW_RANGE 1000
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/* Used by safe division - increment divisor by one if it is zero */
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#define SD(X) (X != 0 ? X : 1)
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struct branchstat
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{
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int taken;
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int taken;
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int nottaken;
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int nottaken;
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int forward;
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int forward;
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int backward;
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int backward;
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};
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};
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/* See also enum insn_type in abstract.h */
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/*! @see also enum insn_type in abstract.h */
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const char func_unit_str[30][30] = { "unknown", "exception", "arith", "shift", "compare",
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static const char func_unit_str[30][30] = {
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"branch", "jump", "load", "store", "movimm", "move", "extend", "nop", "mac" };
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"unknown",
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"exception",
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struct dstats_entry dstats[DSTATS_LEN]; /* dependency stats */
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"arith",
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struct sstats_entry sstats[SSTATS_LEN]; /* single stats */
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"shift",
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struct fstats_entry fstats[FSTATS_LEN]; /* functional units stats */
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"compare",
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struct mstats_entry or1k_mstats = {0}; /* misc units stats */
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"branch",
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struct cachestats_entry ic_stats = {0}; /* instruction cache stats */
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"jump",
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struct cachestats_entry dc_stats = {0}; /* data cache stats */
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"load",
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struct immustats_entry immu_stats = {0}; /* insn mmu stats */
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"store",
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struct dmmustats_entry dmmu_stats = {0}; /* data mmu stats */
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"movimm",
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struct raw_stats raw_stats; /* RAW hazard stats */
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"move",
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"extend",
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"nop",
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"mac"
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};
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struct dstats_entry
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{
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int insn1;
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int insn2;
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int cnt_dynamic;
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int depend;
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}; /*!< double stats */
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struct sstats_entry
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{
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int insn;
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int cnt_dynamic;
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}; /*!< single stats */
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struct fstats_entry
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{
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enum insn_type insn1;
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enum insn_type insn2;
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int cnt_dynamic;
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int depend;
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}; /*!< functional units stats */
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void addsstats(int item, int cnt_dynamic)
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struct raw_stats
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{
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int reg[64];
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int range[RAW_RANGE];
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}; /*!< RAW hazard stats */
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/* Globally visible statistics data. Renamed mstats to or1k_mstats because Mac
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OS X has a lib function called mstats */
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struct mstats_entry or1k_mstats = { 0 }; /*!< misc units stats */
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struct cachestats_entry ic_stats = { 0 }; /*!< instruction cache stats */
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struct cachestats_entry dc_stats = { 0 }; /*!< data cache stats */
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struct immustats_entry immu_stats = { 0 }; /*!< insn MMU stats */
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struct dmmustats_entry dmmu_stats = { 0 }; /*!< data MMU stats */
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/* Statistics data strutures used just here */
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static struct dstats_entry dstats[DSTATS_LEN]; /*!< dependency stats */
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static struct sstats_entry sstats[SSTATS_LEN]; /*!< single stats */
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static struct fstats_entry fstats[FSTATS_LEN]; /*!< func units stats */
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static struct raw_stats raw_stats; /*!< RAW hazard stats */
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void
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addsstats (int item, int cnt_dynamic)
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{
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{
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int i = 0;
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int i = 0;
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while(sstats[i].insn != item && sstats[i].insn >= 0 && i < SSTATS_LEN) i++;
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while (sstats[i].insn != item && sstats[i].insn >= 0 && i < SSTATS_LEN)
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i++;
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if (i >= SSTATS_LEN - 1) return;
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if (i >= SSTATS_LEN - 1)
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return;
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if (sstats[i].insn >= 0) {
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if (sstats[i].insn >= 0)
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{
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sstats[i].cnt_dynamic += cnt_dynamic;
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sstats[i].cnt_dynamic += cnt_dynamic;
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} else {
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}
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else
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{
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sstats[i].insn = item;
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sstats[i].insn = item;
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sstats[i].cnt_dynamic = cnt_dynamic;
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sstats[i].cnt_dynamic = cnt_dynamic;
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}
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}
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}
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}
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void adddstats(int item1, int item2, int cnt_dynamic, int depend)
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void
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adddstats (int item1, int item2, int cnt_dynamic, int depend)
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{
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{
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int i = 0;
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int i = 0;
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while((dstats[i].insn1 != item1 || dstats[i].insn2 != item2) && (i < DSTATS_LEN) && dstats[i].insn1 >= 0) i++;
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while ((dstats[i].insn1 != item1 || dstats[i].insn2 != item2)
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&& (i < DSTATS_LEN) && dstats[i].insn1 >= 0)
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i++;
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if (i >= DSTATS_LEN - 1) return;
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if (i >= DSTATS_LEN - 1)
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return;
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if (dstats[i].insn1 >= 0) {
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if (dstats[i].insn1 >= 0)
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{
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dstats[i].cnt_dynamic += cnt_dynamic;
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dstats[i].cnt_dynamic += cnt_dynamic;
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dstats[i].depend += depend;
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dstats[i].depend += depend;
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} else {
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}
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else
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{
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dstats[i].insn1 = item1;
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dstats[i].insn1 = item1;
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dstats[i].insn2 = item2;
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dstats[i].insn2 = item2;
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dstats[i].cnt_dynamic = cnt_dynamic;
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dstats[i].cnt_dynamic = cnt_dynamic;
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dstats[i].depend = depend;
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dstats[i].depend = depend;
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}
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}
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}
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}
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void addfstats(enum insn_type item1, enum insn_type item2, int cnt_dynamic, int depend)
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void
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addfstats (enum insn_type item1, enum insn_type item2, int cnt_dynamic,
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int depend)
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{
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{
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int i = 0;
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int i = 0;
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while(((fstats[i].insn1 != item1) || (fstats[i].insn2 != item2)) &&
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while(((fstats[i].insn1 != item1) || (fstats[i].insn2 != item2)) &&
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(fstats[i].insn1 != it_unknown) &&
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(fstats[i].insn1 != it_unknown) && (i < FSTATS_LEN))
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(i < FSTATS_LEN))
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i++;
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i++;
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if (i >= FSTATS_LEN - 1) return;
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if (i >= FSTATS_LEN - 1)
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return;
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if ((fstats[i].insn1 == item1) &&
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if ((fstats[i].insn1 == item1) && (fstats[i].insn2 == item2))
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(fstats[i].insn2 == item2)) {
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{
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fstats[i].cnt_dynamic += cnt_dynamic;
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fstats[i].cnt_dynamic += cnt_dynamic;
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fstats[i].depend += depend;
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fstats[i].depend += depend;
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}
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}
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else {
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else
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{
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fstats[i].insn1 = item1;
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fstats[i].insn1 = item1;
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fstats[i].insn2 = item2;
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fstats[i].insn2 = item2;
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fstats[i].cnt_dynamic = cnt_dynamic;
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fstats[i].cnt_dynamic = cnt_dynamic;
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fstats[i].depend = depend;
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fstats[i].depend = depend;
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}
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}
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}
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}
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void initstats()
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void
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initstats ()
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{
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{
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int i;
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int i;
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memset(sstats, 0, sizeof(sstats));
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memset(sstats, 0, sizeof(sstats));
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for (i = 0; i < SSTATS_LEN; i++)
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for (i = 0; i < SSTATS_LEN; i++)
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sstats[i].insn = -1;
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sstats[i].insn = -1;
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| Line 133... |
Line 203... |
memset(&ic_stats, 0, sizeof(ic_stats));
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memset(&ic_stats, 0, sizeof(ic_stats));
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memset(&dc_stats, 0, sizeof(dc_stats));
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memset(&dc_stats, 0, sizeof(dc_stats));
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memset(&raw_stats, 0, sizeof(raw_stats));
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memset(&raw_stats, 0, sizeof(raw_stats));
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}
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}
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void printotherstats(int which)
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static void
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printotherstats (int which)
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{
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{
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PRINTF ("\n");
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PRINTF ("\n");
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if (config.bpb.enabled) {
|
if (config.bpb.enabled)
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{
|
struct branchstat bf;
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struct branchstat bf;
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struct branchstat bnf;
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struct branchstat bnf;
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long bf_all, bnf_all;
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long bf_all, bnf_all;
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bf.taken = or1k_mstats.bf[1][0] + or1k_mstats.bf[1][1];
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bf.taken = or1k_mstats.bf[1][0] + or1k_mstats.bf[1][1];
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bf.nottaken = or1k_mstats.bf[0][0] + or1k_mstats.bf[0][1];
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bf.nottaken = or1k_mstats.bf[0][0] + or1k_mstats.bf[0][1];
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| Line 152... |
Line 224... |
bnf.nottaken = or1k_mstats.bnf[0][0] + or1k_mstats.bf[0][1];
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bnf.nottaken = or1k_mstats.bnf[0][0] + or1k_mstats.bf[0][1];
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bnf.forward = or1k_mstats.bnf[0][1] + or1k_mstats.bf[1][1];
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bnf.forward = or1k_mstats.bnf[0][1] + or1k_mstats.bf[1][1];
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bnf.backward = or1k_mstats.bnf[0][0] + or1k_mstats.bf[1][0];
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bnf.backward = or1k_mstats.bnf[0][0] + or1k_mstats.bf[1][0];
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bnf_all = bnf.forward + bnf.backward;
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bnf_all = bnf.forward + bnf.backward;
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PRINTF("bnf: %d (%ld%%) taken,", bf.taken, (bf.taken * 100) / SD(bf_all));
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PRINTF ("bnf: %d (%ld%%) taken,", bf.taken,
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PRINTF(" %d (%ld%%) not taken,", bf.nottaken, (bf.nottaken * 100) / SD(bf_all));
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(bf.taken * 100) / SD (bf_all));
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PRINTF(" %d (%ld%%) forward,", bf.forward, (bf.forward * 100) / SD(bf_all));
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PRINTF (" %d (%ld%%) not taken,", bf.nottaken,
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PRINTF(" %d (%ld%%) backward\n", bf.backward, (bf.backward * 100) / SD(bf_all));
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(bf.nottaken * 100) / SD (bf_all));
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PRINTF("bf: %d (%ld%%) taken,", bnf.taken, (bnf.taken * 100) / SD(bnf_all));
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PRINTF (" %d (%ld%%) forward,", bf.forward,
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PRINTF(" %d (%ld%%) not taken,", bnf.nottaken, (bnf.nottaken * 100) / SD(bnf_all));
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(bf.forward * 100) / SD (bf_all));
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PRINTF(" %d (%ld%%) forward,", bnf.forward, (bnf.forward * 100) / SD(bnf_all));
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PRINTF (" %d (%ld%%) backward\n", bf.backward,
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PRINTF(" %d (%ld%%) backward\n", bnf.backward, (bnf.backward * 100) / SD(bnf_all));
|
(bf.backward * 100) / SD (bf_all));
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PRINTF ("bf: %d (%ld%%) taken,", bnf.taken,
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PRINTF("StaticBP bnf(%s): correct %ld%%\n", config.bpb.sbp_bnf_fwd ? "forward" : "backward",
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(bnf.taken * 100) / SD (bnf_all));
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(or1k_mstats.bnf[0][config.bpb.sbp_bnf_fwd] * 100) / SD(bnf_all));
|
PRINTF (" %d (%ld%%) not taken,", bnf.nottaken,
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PRINTF("StaticBP bf(%s): correct %ld%%\n", config.bpb.sbp_bf_fwd ? "forward" : "backward",
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(bnf.nottaken * 100) / SD (bnf_all));
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(or1k_mstats.bnf[1][config.bpb.sbp_bf_fwd] * 100) / SD(bf_all));
|
PRINTF (" %d (%ld%%) forward,", bnf.forward,
|
PRINTF("BPB: hit %d (correct %d%%), miss %d\n", or1k_mstats.bpb.hit, (or1k_mstats.bpb.correct * 100) / SD(or1k_mstats.bpb.hit), or1k_mstats.bpb.miss);
|
(bnf.forward * 100) / SD (bnf_all));
|
} else
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PRINTF (" %d (%ld%%) backward\n", bnf.backward,
|
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(bnf.backward * 100) / SD (bnf_all));
|
|
|
|
PRINTF ("StaticBP bnf(%s): correct %ld%%\n",
|
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config.bpb.sbp_bnf_fwd ? "forward" : "backward",
|
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(or1k_mstats.bnf[0][config.bpb.sbp_bnf_fwd] * 100) /
|
|
SD (bnf_all));
|
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PRINTF ("StaticBP bf(%s): correct %ld%%\n",
|
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config.bpb.sbp_bf_fwd ? "forward" : "backward",
|
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(or1k_mstats.bnf[1][config.bpb.sbp_bf_fwd] * 100) /
|
|
SD (bf_all));
|
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PRINTF ("BPB: hit %d (correct %d%%), miss %d\n", or1k_mstats.bpb.hit,
|
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(or1k_mstats.bpb.correct * 100) / SD (or1k_mstats.bpb.hit),
|
|
or1k_mstats.bpb.miss);
|
|
}
|
|
else
|
PRINTF("BPB simulation disabled. Enable it to see BPB analysis\n");
|
PRINTF("BPB simulation disabled. Enable it to see BPB analysis\n");
|
|
|
if (config.bpb.btic) {
|
if (config.bpb.btic)
|
PRINTF("BTIC: hit %d(%d%%), miss %d\n", or1k_mstats.btic.hit, (or1k_mstats.btic.hit * 100) / SD(or1k_mstats.btic.hit + or1k_mstats.btic.miss), or1k_mstats.btic.miss);
|
{
|
} else
|
PRINTF ("BTIC: hit %d(%d%%), miss %d\n", or1k_mstats.btic.hit,
|
|
(or1k_mstats.btic.hit * 100) / SD (or1k_mstats.btic.hit +
|
|
or1k_mstats.btic.miss),
|
|
or1k_mstats.btic.miss);
|
|
}
|
|
else
|
PRINTF("BTIC simulation disabled. Enabled it to see BTIC analysis\n");
|
PRINTF("BTIC simulation disabled. Enabled it to see BTIC analysis\n");
|
|
|
if(ic_state->enabled) {
|
if (ic_state->enabled)
|
PRINTF("IC read: hit %d(%d%%), miss %d\n", ic_stats.readhit, (ic_stats.readhit * 100) / SD(ic_stats.readhit + ic_stats.readmiss), ic_stats.readmiss);
|
{
|
} else
|
PRINTF ("IC read: hit %d(%d%%), miss %d\n", ic_stats.readhit,
|
|
(ic_stats.readhit * 100) / SD (ic_stats.readhit +
|
|
ic_stats.readmiss),
|
|
ic_stats.readmiss);
|
|
}
|
|
else
|
PRINTF("No ICache. Enable it to see IC results.\n");
|
PRINTF("No ICache. Enable it to see IC results.\n");
|
|
|
if (config.dc.enabled) {
|
if (config.dc.enabled)
|
PRINTF("DC read: hit %d(%d%%), miss %d\n", dc_stats.readhit, (dc_stats.readhit * 100) / SD(dc_stats.readhit + dc_stats.readmiss), dc_stats.readmiss);
|
{
|
PRINTF("DC write: hit %d(%d%%), miss %d\n", dc_stats.writehit, (dc_stats.writehit * 100) / SD(dc_stats.writehit + dc_stats.writemiss), dc_stats.writemiss);
|
PRINTF ("DC read: hit %d(%d%%), miss %d\n", dc_stats.readhit,
|
} else
|
(dc_stats.readhit * 100) / SD (dc_stats.readhit +
|
|
dc_stats.readmiss),
|
|
dc_stats.readmiss);
|
|
PRINTF ("DC write: hit %d(%d%%), miss %d\n", dc_stats.writehit,
|
|
(dc_stats.writehit * 100) / SD (dc_stats.writehit +
|
|
dc_stats.writemiss),
|
|
dc_stats.writemiss);
|
|
}
|
|
else
|
PRINTF("No DCache. Enable it to see DC results.\n");
|
PRINTF("No DCache. Enable it to see DC results.\n");
|
|
|
if (cpu_state.sprs[SPR_UPR] & SPR_UPR_IMP) {
|
if (cpu_state.sprs[SPR_UPR] & SPR_UPR_IMP)
|
PRINTF("IMMU read: hit %d(%d%%), miss %d\n", immu_stats.fetch_tlbhit, (immu_stats.fetch_tlbhit * 100) / SD(immu_stats.fetch_tlbhit + immu_stats.fetch_tlbmiss), immu_stats.fetch_tlbmiss);
|
{
|
} else
|
PRINTF ("IMMU read: hit %d(%d%%), miss %d\n", immu_stats.fetch_tlbhit,
|
|
(immu_stats.fetch_tlbhit * 100) / SD (immu_stats.fetch_tlbhit +
|
|
immu_stats.fetch_tlbmiss),
|
|
immu_stats.fetch_tlbmiss);
|
|
}
|
|
else
|
PRINTF("No IMMU. Set UPR[IMP]\n");
|
PRINTF("No IMMU. Set UPR[IMP]\n");
|
|
|
if (cpu_state.sprs[SPR_UPR] & SPR_UPR_DMP) {
|
if (cpu_state.sprs[SPR_UPR] & SPR_UPR_DMP)
|
PRINTF("DMMU read: hit %d(%d%%), miss %d\n", dmmu_stats.loads_tlbhit, (dmmu_stats.loads_tlbhit * 100) / SD(dmmu_stats.loads_tlbhit + dmmu_stats.loads_tlbmiss), dmmu_stats.loads_tlbmiss);
|
{
|
} else
|
PRINTF ("DMMU read: hit %d(%d%%), miss %d\n", dmmu_stats.loads_tlbhit,
|
|
(dmmu_stats.loads_tlbhit * 100) / SD (dmmu_stats.loads_tlbhit +
|
|
dmmu_stats.loads_tlbmiss),
|
|
dmmu_stats.loads_tlbmiss);
|
|
}
|
|
else
|
PRINTF("No DMMU. Set UPR[DMP]\n");
|
PRINTF("No DMMU. Set UPR[DMP]\n");
|
|
|
PRINTF("Additional LOAD CYCLES: %u STORE CYCLES: %u\n", runtime.sim.loadcycles, runtime.sim.storecycles);
|
PRINTF ("Additional LOAD CYCLES: %u STORE CYCLES: %u\n",
|
|
runtime.sim.loadcycles, runtime.sim.storecycles);
|
}
|
}
|
|
|
void printstats(int which)
|
void
|
|
printstats (int which)
|
{
|
{
|
int i, all = 0, dependall = 0;
|
int i, all = 0, dependall = 0;
|
|
|
if (which > 1 && which <= 5 && !config.cpu.dependstats) {
|
if (which > 1 && which <= 5 && !config.cpu.dependstats)
|
PRINTF("Hazard analysis disabled. Enable it to see analysis results.\n");
|
{
|
|
PRINTF
|
|
("Hazard analysis disabled. Enable it to see analysis results.\n");
|
return;
|
return;
|
}
|
}
|
|
|
switch (which) {
|
switch (which)
|
|
{
|
case 1:
|
case 1:
|
PRINTF("stats 1: Misc stats\n");
|
PRINTF("stats 1: Misc stats\n");
|
printotherstats(which);
|
printotherstats(which);
|
break;
|
break;
|
case 2:
|
case 2:
|
| Line 219... |
Line 339... |
for(i = 0; i < SSTATS_LEN; i++)
|
for(i = 0; i < SSTATS_LEN; i++)
|
all += sstats[i].cnt_dynamic;
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all += sstats[i].cnt_dynamic;
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|
|
for(i = 0; i < SSTATS_LEN; i++)
|
for(i = 0; i < SSTATS_LEN; i++)
|
if (sstats[i].cnt_dynamic)
|
if (sstats[i].cnt_dynamic)
|
PRINTF(" %-15s used %6dx (%5.1f%%)\n", insn_name(sstats[i].insn), sstats[i].cnt_dynamic, (sstats[i].cnt_dynamic * 100.)/SD(all));
|
PRINTF (" %-15s used %6dx (%5.1f%%)\n", insn_name (sstats[i].insn),
|
|
sstats[i].cnt_dynamic,
|
|
(sstats[i].cnt_dynamic * 100.) / SD (all));
|
|
|
PRINTF("%d instructions (dynamic, single stats)\n", all);
|
PRINTF("%d instructions (dynamic, single stats)\n", all);
|
break;
|
break;
|
|
|
case 3:
|
case 3:
|
PRINTF ("stats 3: Instruction dependencies\n");
|
PRINTF ("stats 3: Instruction dependencies\n");
|
for(i = 0; i < DSTATS_LEN; i++) {
|
for (i = 0; i < DSTATS_LEN; i++)
|
|
{
|
all += dstats[i].cnt_dynamic;
|
all += dstats[i].cnt_dynamic;
|
dependall += dstats[i].depend;
|
dependall += dstats[i].depend;
|
}
|
}
|
|
|
for(i = 0; i < DSTATS_LEN; i++)
|
for(i = 0; i < DSTATS_LEN; i++)
|
if (dstats[i].cnt_dynamic) {
|
if (dstats[i].cnt_dynamic)
|
|
{
|
char temp[100];
|
char temp[100];
|
sprintf(temp, "%s, %s ", insn_name(dstats[i].insn1), insn_name(dstats[i].insn2));
|
sprintf (temp, "%s, %s ", insn_name (dstats[i].insn1),
|
PRINTF(" %-30s %6dx (%5.1f%%)", temp, dstats[i].cnt_dynamic, (dstats[i].cnt_dynamic * 100.)/SD(all));
|
insn_name (dstats[i].insn2));
|
PRINTF(" depend: %5.1f%%\n", (dstats[i].depend * 100.) / dstats[i].cnt_dynamic);
|
PRINTF (" %-30s %6dx (%5.1f%%)", temp, dstats[i].cnt_dynamic,
|
|
(dstats[i].cnt_dynamic * 100.) / SD (all));
|
|
PRINTF (" depend: %5.1f%%\n",
|
|
(dstats[i].depend * 100.) / dstats[i].cnt_dynamic);
|
}
|
}
|
|
|
PRINTF("%d instructions (dynamic, dependency stats) depend: %d%%\n", all, (dependall * 100) / SD(all));
|
PRINTF ("%d instructions (dynamic, dependency stats) depend: %d%%\n",
|
|
all, (dependall * 100) / SD (all));
|
break;
|
break;
|
|
|
case 4:
|
case 4:
|
PRINTF("stats 4: Functional units dependencies\n");
|
PRINTF("stats 4: Functional units dependencies\n");
|
for(i = 0; i < FSTATS_LEN; i++) {
|
for (i = 0; i < FSTATS_LEN; i++)
|
|
{
|
all += fstats[i].cnt_dynamic;
|
all += fstats[i].cnt_dynamic;
|
dependall += fstats[i].depend;
|
dependall += fstats[i].depend;
|
}
|
}
|
|
|
for(i = 0; i < FSTATS_LEN; i++)
|
for(i = 0; i < FSTATS_LEN; i++)
|
if (fstats[i].cnt_dynamic) {
|
if (fstats[i].cnt_dynamic)
|
|
{
|
char temp[100];
|
char temp[100];
|
sprintf(temp, "%s, %s", func_unit_str[fstats[i].insn1], func_unit_str[fstats[i].insn2]);
|
sprintf (temp, "%s, %s", func_unit_str[fstats[i].insn1],
|
PRINTF(" %-30s %6dx (%5.1f%%)", temp, fstats[i].cnt_dynamic, (fstats[i].cnt_dynamic * 100.)/SD(all));
|
func_unit_str[fstats[i].insn2]);
|
PRINTF(" depend: %5.1f%%\n", (fstats[i].depend * 100.) / fstats[i].cnt_dynamic);
|
PRINTF (" %-30s %6dx (%5.1f%%)", temp, fstats[i].cnt_dynamic,
|
}
|
(fstats[i].cnt_dynamic * 100.) / SD (all));
|
PRINTF ("%d instructions (dynamic, functional units stats) depend: %d%%\n\n", all, (dependall * 100) / SD(all));
|
PRINTF (" depend: %5.1f%%\n",
|
|
(fstats[i].depend * 100.) / fstats[i].cnt_dynamic);
|
|
}
|
|
PRINTF
|
|
("%d instructions (dynamic, functional units stats) depend: %d%%\n\n",
|
|
all, (dependall * 100) / SD (all));
|
break;
|
break;
|
|
|
case 5:
|
case 5:
|
PRINTF("stats 5: Raw register usage over time\n");
|
PRINTF("stats 5: Raw register usage over time\n");
|
#if RAW_RANGE_STATS
|
#if RAW_RANGE_STATS
|
for(i = 0; (i < MAX_RANGE); i++)
|
for(i = 0; (i < MAX_RANGE); i++)
|
PRINTF(" Register set and reused in %d. cycle: %d cases\n", i, raw_stats.range[i]);
|
PRINTF (" Register set and reused in %d. cycle: %d cases\n", i,
|
|
raw_stats.range[i]);
|
#endif
|
#endif
|
break;
|
break;
|
case 6:
|
case 6:
|
if (config.cpu.sbuf_len) {
|
if (config.cpu.sbuf_len)
|
|
{
|
extern int sbuf_total_cyc, sbuf_wait_cyc;
|
extern int sbuf_total_cyc, sbuf_wait_cyc;
|
PRINTF ("stats 6: Store buffer analysis\n");
|
PRINTF ("stats 6: Store buffer analysis\n");
|
PRINTF ("Using store buffer of length %i.\n", config.cpu.sbuf_len);
|
PRINTF ("Using store buffer of length %i.\n", config.cpu.sbuf_len);
|
PRINTF ("Number of total memory store cycles: %i/%lli\n", sbuf_total_cyc,
|
PRINTF ("Number of total memory store cycles: %i/%lli\n",
|
|
sbuf_total_cyc,
|
runtime.sim.cycles + sbuf_total_cyc - sbuf_wait_cyc);
|
runtime.sim.cycles + sbuf_total_cyc - sbuf_wait_cyc);
|
PRINTF ("Number of cycles waiting for memory stores: %i\n", sbuf_wait_cyc);
|
PRINTF ("Number of cycles waiting for memory stores: %i\n",
|
PRINTF ("Number of memory cycles spared: %i\n", sbuf_total_cyc - sbuf_wait_cyc);
|
sbuf_wait_cyc);
|
PRINTF ("Store speedup %3.2f%%, total speedup %3.2f%%\n", 100.*(sbuf_total_cyc - sbuf_wait_cyc)/sbuf_total_cyc,
|
PRINTF ("Number of memory cycles spared: %i\n",
|
100.*(sbuf_total_cyc - sbuf_wait_cyc) / (runtime.sim.cycles + sbuf_total_cyc - sbuf_wait_cyc));
|
sbuf_total_cyc - sbuf_wait_cyc);
|
} else
|
PRINTF ("Store speedup %3.2f%%, total speedup %3.2f%%\n",
|
PRINTF ("Store buffer analysis disabled. Enable it to see analysis results.\n");
|
100. * (sbuf_total_cyc - sbuf_wait_cyc) / sbuf_total_cyc,
|
|
100. * (sbuf_total_cyc -
|
|
sbuf_wait_cyc) / (runtime.sim.cycles +
|
|
sbuf_total_cyc - sbuf_wait_cyc));
|
|
}
|
|
else
|
|
PRINTF
|
|
("Store buffer analysis disabled. Enable it to see analysis results.\n");
|
break;
|
break;
|
default:
|
default:
|
PRINTF ("Please specify a stats group (1-6).\n");
|
PRINTF ("Please specify a stats group (1-6).\n");
|
break;
|
break;
|
}
|
}
|
#if 0
|
|
PRINTF("Byte ADD: %d instructions\n", or1k_mstats.byteadd);
|
|
#endif
|
|
}
|
}
|
|
|
No newline at end of file
|
No newline at end of file
|
