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[/] [or1k/] [trunk/] [or1ksim/] [cpu/] [or1k/] [sprs.c] - Diff between revs 1540 and 1549
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| Rev 1540 |
Rev 1549 |
| Line 155... |
Line 155... |
PRINTF ("SUSPEND: PMR[SUME] bit was set.\n");
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PRINTF ("SUSPEND: PMR[SUME] bit was set.\n");
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sim_done();
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sim_done();
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}
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}
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break;
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break;
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default:
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default:
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/* Mask reseved bits in DTLBMR and DTLBMR registers */
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/* Mask reserved bits in DTLBMR and DTLBMR registers */
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if ( (regno >= SPR_DTLBMR_BASE(0)) && (regno < SPR_DTLBTR_LAST(3))) {
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if ( (regno >= SPR_DTLBMR_BASE(0)) && (regno < SPR_DTLBTR_LAST(3))) {
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if((regno & 0xff) < 0x80)
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if((regno & 0xff) < 0x80)
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cpu_state.sprs[regno] = ((value / config.dmmu.pagesize) * config.dmmu.pagesize) |
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cpu_state.sprs[regno] = ((value / config.dmmu.pagesize) * config.dmmu.pagesize) |
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(value & (SPR_DTLBMR_V | SPR_DTLBMR_PL1 | SPR_DTLBMR_CID | SPR_DTLBMR_LRU));
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(value & (SPR_DTLBMR_V | SPR_DTLBMR_PL1 | SPR_DTLBMR_CID | SPR_DTLBMR_LRU));
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else
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else
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