OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [cpu/] [or1k/] [sprs.h] - Diff between revs 1508 and 1532

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 1508 Rev 1532
Line 19... Line 19...
 
 
/* Prototypes */
/* Prototypes */
void mtspr(uint16_t regno, const uorreg_t value);
void mtspr(uint16_t regno, const uorreg_t value);
uorreg_t mfspr(const uint16_t regno);
uorreg_t mfspr(const uint16_t regno);
void sprs_status(void);
void sprs_status(void);
 
char *dump_spr(uint16_t spr, uorreg_t spr_val);
 
 
/* Set specific SPR bit(s) identified by mask. */
 
static inline void
 
setsprbits(const int regno, const unsigned long mask, const unsigned long value)
 
{
 
  uorreg_t regvalue = cpu_state.sprs[regno];
 
  uorreg_t shifted = 0x0;
 
  int m, v = 0;
 
 
 
  /* m counts bits in valuemask */
 
  /* v counts bits in value */
 
  for (m = 0; m < 32; m++)
 
    if ((mask >> m) & 0x1) {
 
      shifted |= ((value >> v) & 0x1) << m;
 
      v++;
 
    }
 
 
 
  /* PRINTF("oldvalue %x setsprbits(%x, %x, %x)  shifted %x", regvalue, regno, mask, value, shifted); */
 
  cpu_state.sprs[regno] = (regvalue & ~mask) | shifted;
 
}
 
 
 
/* Get specific SPR bit(s) identified by mask. */
 
static inline unsigned long
 
getsprbits(const int regno, const unsigned long mask)
 
{
 
  uorreg_t regvalue = cpu_state.sprs[regno];
 
  uorreg_t shifted = 0x0;
 
  int m, v = 0;
 
 
 
  /* m counts bits in valuemask */
 
  /* v counts bits in regvalue */
 
  for (m = 0; m < 32; m++)
 
    if ((mask >> m) & 0x1) {
 
      shifted |= ((regvalue >> m) & 0x1) << v;
 
      v++;
 
    }
 
 
 
  return shifted;
 
}
 
 
 
 
 
 No newline at end of file
 No newline at end of file

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.