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[/] [or1k/] [trunk/] [or1ksim/] [cpu/] [or32/] [execute.c] - Diff between revs 1678 and 1690

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Rev 1678 Rev 1690
Line 49... Line 49...
#include "sprs.h"
#include "sprs.h"
#include "immu.h"
#include "immu.h"
#include "dmmu.h"
#include "dmmu.h"
#include "debug.h"
#include "debug.h"
#include "stats.h"
#include "stats.h"
 
#include "gdbcomm.h"
 
#include "sched.h"
 
#include "vapi.h"
#include "misc.h"
#include "misc.h"
 
 
/* Current cpu state */
/* Current cpu state */
struct cpu_state cpu_state;
struct cpu_state cpu_state;
 
 
Line 696... Line 699...
void l_invalid () {
void l_invalid () {
#endif
#endif
  except_handle(EXCEPT_ILLEGAL, cpu_state.iqueue.insn_addr);
  except_handle(EXCEPT_ILLEGAL, cpu_state.iqueue.insn_addr);
}
}
 
 
 
void exec_main(void)
 
{
 
  long long time_start;
 
  while(1) {
 
    time_start = runtime.sim.cycles;
 
    if (config.debug.enabled) {
 
      du_clock(); // reset watchpoints
 
      while (runtime.cpu.stalled) {
 
        if(config.debug.gdb_enabled) {
 
          BlockJTAG();
 
          HandleServerSocket(false);
 
        } else {
 
          fprintf (stderr, "WARNING: CPU stalled and gdb connection not enabled.\n");
 
          /* Dump the user into interactive mode.  From there he can decide what
 
           * to do. */
 
          handle_sim_command();
 
          sim_done();
 
        }
 
        if(runtime.sim.iprompt)
 
          handle_sim_command();
 
      }
 
    }
 
 
 
    /* Each cycle has counter of mem_cycles; this value is joined with cycles
 
       at the end of the cycle; no sim originated memory accesses should be
 
       performed inbetween. */
 
    runtime.sim.mem_cycles = 0;
 
    if (!config.pm.enabled ||
 
        !(cpu_state.sprs[SPR_PMR] & (SPR_PMR_DME | SPR_PMR_SME)))
 
      if (cpu_clock ())
 
        /* A breakpoint has been hit, drop to interactive mode */
 
        handle_sim_command();
 
 
 
    if (config.vapi.enabled && runtime.vapi.enabled) vapi_check();
 
    if (config.debug.gdb_enabled) HandleServerSocket(false); /* block & check_stdin = false */
 
    if(config.debug.enabled)
 
      if (cpu_state.sprs[SPR_DMR1] & SPR_DMR1_ST) set_stall_state (1);
 
 
 
    runtime.sim.cycles += runtime.sim.mem_cycles;
 
    scheduler.job_queue->time -= runtime.sim.cycles - time_start;
 
    if (scheduler.job_queue->time <= 0) do_scheduler ();
 
  }
 
}
 
 
#if COMPLEX_EXECUTION
#if COMPLEX_EXECUTION
 
 
/* Include decode_execute function */
/* Include decode_execute function */
#include "execgen.c"
#include "execgen.c"
 
 

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